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dcd7a1bde2
Summary: This hidden option would disable code generation through FastISel by default. It was removed from the available options and from the Fast-ISel tests that required it in order to run the tests. Reviewers: dsanders Subscribers: qcolombet, llvm-commits Differential Revision: http://reviews.llvm.org/D11610 llvm-svn: 243638
19 lines
623 B
LLVM
19 lines
623 B
LLVM
; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=pic \
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; RUN: -fast-isel=true -fast-isel-abort=1 < %s | FileCheck %s
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; RUN: llc -march=mipsel -mcpu=mips32r2 -relocation-model=pic \
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; RUN: -fast-isel=true -fast-isel-abort=1 < %s | FileCheck %s
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@ARR = external global [10 x i32], align 4
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define void @foo() {
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; CHECK-LABEL: foo
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; CHECK-DAG: lw $[[ARR:[0-9]+]], %got(ARR)({{.*}})
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; CHECK-DAG: addiu $[[T0:[0-9]+]], $zero, 12345
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; CHECK: sw $[[T0]], 8($[[ARR]])
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entry:
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store i32 12345, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @ARR, i32 0, i32 2), align 4
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ret void
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}
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