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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/test/CodeGen
Dale Johannesen ff6e66e502 PowerPC inline asm was emitting two output operands
for a single "m" constraint; this is wrong because the
opcode of a load or store would have to change in parallel.
This patch makes it always compute addresses into a register,
which is correct but not as efficient as possible.  7144566.

llvm-svn: 79292
2009-08-18 00:18:39 +00:00
..
Alpha
ARM Reapply r79127. It was fixed by d0k. 2009-08-15 21:21:19 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic
Mips
MSP430
PIC16
PowerPC PowerPC inline asm was emitting two output operands 2009-08-18 00:18:39 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86 Fix test on Linux. 2009-08-15 21:28:17 +00:00
XCore Update getSectionForConstant() to to allow mergable sections to be nulled out 2009-08-17 16:37:11 +00:00