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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/test/MC
James Molloy c4fcff419c Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit.
Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format.

Add decoder and disassembler tests.

Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT.

llvm-svn: 140696
2011-09-28 14:21:38 +00:00
..
ARM Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit. 2011-09-28 14:21:38 +00:00
AsmParser Added regression test for bug #10869. 2011-09-19 07:48:08 +00:00
COFF Add the suffix to the Win64 EH data sections' names if given. Add a test for 2011-05-27 21:38:47 +00:00
Disassembler Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit. 2011-09-28 14:21:38 +00:00
ELF Fix the bitwidth of the remaining fields. 2011-08-04 17:00:11 +00:00
MachO Fix a Darwin x86_64 special case of a jmp to a temporary symbol from an atom 2011-09-08 20:53:44 +00:00
MBlaze Teach the MBlaze asm parser how to parse special purpose register names. 2010-12-20 20:43:24 +00:00
X86 The wrong relocation was being emitted for several SSSE3 instructions. 2011-09-20 21:39:21 +00:00