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mirror of https://github.com/RPCS3/rpcs3.git synced 2024-11-23 03:02:53 +01:00

rsx: Pause FIFO queue when changing ctrl registers

This commit is contained in:
kd-11 2017-12-09 13:14:00 +03:00
parent 6891323c18
commit 0d0821e914
3 changed files with 28 additions and 0 deletions

View File

@ -240,9 +240,11 @@ s32 sys_rsx_context_attribute(s32 context_id, u32 package_id, u64 a3, u64 a4, u6
switch (package_id)
{
case 0x001: // FIFO
render->pause();
render->ctrl->get = a3;
render->ctrl->put = a4;
render->internal_get = a3;
render->unpause();
break;
case 0x100: // Display mode set

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@ -483,6 +483,14 @@ namespace rsx
//Execute backend-local tasks first
do_local_task();
//Wait for external pause events
if (external_interrupt_lock.load())
{
external_interrupt_ack.store(true);
while (external_interrupt_lock.load()) _mm_pause();
}
//Now load the FIFO ctrl registers
ctrl->get.store(internal_get.load());
const u32 put = ctrl->put;
@ -2137,4 +2145,17 @@ namespace rsx
{
check_zcull_status(false, false);
}
//Pause/cont wrappers for FIFO ctrl. Never call this from rsx thread itself!
void thread::pause()
{
external_interrupt_lock.store(true);
while (!external_interrupt_ack.load()) _mm_pause();
external_interrupt_ack.store(false);
}
void thread::unpause()
{
external_interrupt_lock.store(false);
}
}

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@ -233,6 +233,8 @@ namespace rsx
public:
RsxDmaControl* ctrl = nullptr;
atomic_t<u32> internal_get{ 0 };
atomic_t<bool> external_interrupt_lock{ false };
atomic_t<bool> external_interrupt_ack{ false };
GcmTileInfo tiles[limits::tiles_count];
GcmZcullInfo zculls[limits::zculls_count];
@ -477,5 +479,8 @@ namespace rsx
u32 ReadIO32(u32 addr);
void WriteIO32(u32 addr, u32 value);
void pause();
void unpause();
};
}