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rsx: Pause FIFO queue when changing ctrl registers
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6891323c18
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0d0821e914
@ -240,9 +240,11 @@ s32 sys_rsx_context_attribute(s32 context_id, u32 package_id, u64 a3, u64 a4, u6
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switch (package_id)
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{
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case 0x001: // FIFO
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render->pause();
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render->ctrl->get = a3;
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render->ctrl->put = a4;
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render->internal_get = a3;
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render->unpause();
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break;
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case 0x100: // Display mode set
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@ -483,6 +483,14 @@ namespace rsx
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//Execute backend-local tasks first
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do_local_task();
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//Wait for external pause events
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if (external_interrupt_lock.load())
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{
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external_interrupt_ack.store(true);
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while (external_interrupt_lock.load()) _mm_pause();
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}
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//Now load the FIFO ctrl registers
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ctrl->get.store(internal_get.load());
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const u32 put = ctrl->put;
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@ -2137,4 +2145,17 @@ namespace rsx
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{
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check_zcull_status(false, false);
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}
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//Pause/cont wrappers for FIFO ctrl. Never call this from rsx thread itself!
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void thread::pause()
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{
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external_interrupt_lock.store(true);
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while (!external_interrupt_ack.load()) _mm_pause();
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external_interrupt_ack.store(false);
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}
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void thread::unpause()
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{
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external_interrupt_lock.store(false);
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}
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}
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@ -233,6 +233,8 @@ namespace rsx
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public:
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RsxDmaControl* ctrl = nullptr;
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atomic_t<u32> internal_get{ 0 };
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atomic_t<bool> external_interrupt_lock{ false };
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atomic_t<bool> external_interrupt_ack{ false };
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GcmTileInfo tiles[limits::tiles_count];
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GcmZcullInfo zculls[limits::zculls_count];
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@ -477,5 +479,8 @@ namespace rsx
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u32 ReadIO32(u32 addr);
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void WriteIO32(u32 addr, u32 value);
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void pause();
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void unpause();
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};
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}
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