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https://github.com/RPCS3/rpcs3.git
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SPURS kernel v1
This commit is contained in:
Nekotekina
parent
67bc9acbe0
commit
237ab974dd
@ -1,20 +1,92 @@
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#pragma once
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#include <emmintrin.h>
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union u128
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{
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__m128 vf;
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__m128i vi;
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u64 _u64[2];
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s64 _s64[2];
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class u64_reversed_array_2
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{
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u64 data[2];
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public:
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u64& operator [] (s32 index)
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{
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return data[1 - index];
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}
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const u64& operator [] (s32 index) const
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{
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return data[1 - index];
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}
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} u64r;
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u32 _u32[4];
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s32 _s32[4];
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class u32_reversed_array_4
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{
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u32 data[4];
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public:
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u32& operator [] (s32 index)
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{
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return data[3 - index];
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}
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const u32& operator [] (s32 index) const
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{
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return data[3 - index];
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}
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} u32r;
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u16 _u16[8];
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s16 _s16[8];
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class u16_reversed_array_8
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{
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u16 data[8];
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public:
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u16& operator [] (s32 index)
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{
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return data[7 - index];
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}
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const u16& operator [] (s32 index) const
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{
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return data[7 - index];
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}
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} u16r;
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u8 _u8[16];
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s8 _s8[16];
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class u8_reversed_array_16
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{
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u8 data[16];
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public:
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u8& operator [] (s32 index)
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{
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return data[15 - index];
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}
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const u8& operator [] (s32 index) const
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{
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return data[15 - index];
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}
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} u8r;
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float _f[4];
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double _d[2];
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__m128 xmm;
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class bit_array_128
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{
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@ -94,6 +166,11 @@ union u128
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return ret;
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}
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static u128 from64r(u64 _1, u64 _0 = 0)
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{
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return from64(_0, _1);
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}
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static u128 from32(u32 _0, u32 _1 = 0, u32 _2 = 0, u32 _3 = 0)
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{
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u128 ret;
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@ -106,12 +183,7 @@ union u128
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static u128 from32r(u32 _3, u32 _2 = 0, u32 _1 = 0, u32 _0 = 0)
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{
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u128 ret;
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ret._u32[0] = _0;
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ret._u32[1] = _1;
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ret._u32[2] = _2;
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ret._u32[3] = _3;
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return ret;
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return from32(_0, _1, _2, _3);
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}
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static u128 fromBit(u32 bit)
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@ -1,5 +1,7 @@
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#pragma once
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#include <emmintrin.h>
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#ifdef _WIN32
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#define thread_local __declspec(thread)
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#elif __APPLE__
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@ -222,3 +224,27 @@ static __forceinline uint64_t cntlz64(uint64_t arg)
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}
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#endif
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}
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static __forceinline __m128i operator & (__m128i A, __m128i B)
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{
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return _mm_and_si128(A, B);
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}
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static __forceinline __m128i operator | (__m128i A, __m128i B)
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{
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return _mm_or_si128(A, B);
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}
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// compare 16 packed unsigned byte values (greater than)
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static __forceinline __m128i _mm_cmpgt_epu8(__m128i A, __m128i B)
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{
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// (A xor 0x80) > (B xor 0x80)
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return _mm_cmpgt_epi8(_mm_xor_si128(A, _mm_set1_epi8(-128)), _mm_xor_si128(B, _mm_set1_epi8(-128)));
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}
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// compare 16 packed unsigned byte values (less or equal)
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static __forceinline __m128i _mm_cmple_epu8(__m128i A, __m128i B)
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{
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// ((B xor 0x80) > (A xor 0x80)) || A == B
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return _mm_cmpgt_epu8(B, A) | _mm_cmpeq_epi8(A, B);
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}
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@ -9,64 +9,6 @@ using namespace asmjit::host;
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#define UNIMPLEMENTED() UNK(__FUNCTION__)
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#define mmToU64Ptr(x) ((u64*)(&x))
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#define mmToU32Ptr(x) ((u32*)(&x))
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#define mmToU16Ptr(x) ((u16*)(&x))
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#define mmToU8Ptr(x) ((u8*)(&x))
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struct g_imm_table_struct
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{
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//u16 cntb_table[65536];
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__m128i fsmb_table[65536];
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__m128i fsmh_table[256];
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__m128i fsm_table[16];
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__m128i sldq_pshufb[32];
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__m128i srdq_pshufb[32];
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__m128i rldq_pshufb[16];
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g_imm_table_struct()
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{
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/*static_assert(offsetof(g_imm_table_struct, cntb_table) == 0, "offsetof(cntb_table) != 0");
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for (u32 i = 0; i < sizeof(cntb_table) / sizeof(cntb_table[0]); i++)
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{
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u32 cnt_low = 0, cnt_high = 0;
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for (u32 j = 0; j < 8; j++)
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{
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cnt_low += (i >> j) & 1;
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cnt_high += (i >> (j + 8)) & 1;
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}
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cntb_table[i] = (cnt_high << 8) | cnt_low;
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}*/
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for (u32 i = 0; i < sizeof(fsm_table) / sizeof(fsm_table[0]); i++)
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{
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for (u32 j = 0; j < 4; j++) mmToU32Ptr(fsm_table[i])[j] = (i & (1 << j)) ? ~0 : 0;
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}
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for (u32 i = 0; i < sizeof(fsmh_table) / sizeof(fsmh_table[0]); i++)
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{
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for (u32 j = 0; j < 8; j++) mmToU16Ptr(fsmh_table[i])[j] = (i & (1 << j)) ? ~0 : 0;
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}
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for (u32 i = 0; i < sizeof(fsmb_table) / sizeof(fsmb_table[0]); i++)
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{
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for (u32 j = 0; j < 16; j++) mmToU8Ptr(fsmb_table[i])[j] = (i & (1 << j)) ? ~0 : 0;
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}
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for (u32 i = 0; i < sizeof(sldq_pshufb) / sizeof(sldq_pshufb[0]); i++)
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{
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for (u32 j = 0; j < 16; j++) mmToU8Ptr(sldq_pshufb[i])[j] = (u8)(j - i);
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}
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for (u32 i = 0; i < sizeof(srdq_pshufb) / sizeof(srdq_pshufb[0]); i++)
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{
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for (u32 j = 0; j < 16; j++) mmToU8Ptr(srdq_pshufb[i])[j] = (j + i > 15) ? 0xff : (u8)(j + i);
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}
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for (u32 i = 0; i < sizeof(rldq_pshufb) / sizeof(rldq_pshufb[0]); i++)
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{
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for (u32 j = 0; j < 16; j++) mmToU8Ptr(rldq_pshufb[i])[j] = (u8)(j - i) & 0xf;
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}
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}
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};
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class SPURecompiler;
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class SPURecompilerCore : public CPUDecoder
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@ -1018,7 +1018,7 @@ void SPUThread::StopAndSignal(u32 code)
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case 0x003:
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{
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GPR[3]._u32[3] = m_code3_func(*this);
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GPR[3]._u64[1] = m_code3_func(*this);
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break;
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}
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@ -105,6 +105,66 @@ enum
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SPU_RdSigNotify2_offs = 0x1C00C,
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};
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#define mmToU64Ptr(x) ((u64*)(&x))
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#define mmToU32Ptr(x) ((u32*)(&x))
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#define mmToU16Ptr(x) ((u16*)(&x))
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#define mmToU8Ptr(x) ((u8*)(&x))
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struct g_imm_table_struct
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{
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//u16 cntb_table[65536];
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__m128i fsmb_table[65536];
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__m128i fsmh_table[256];
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__m128i fsm_table[16];
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__m128i sldq_pshufb[32];
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__m128i srdq_pshufb[32];
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__m128i rldq_pshufb[16];
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g_imm_table_struct()
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{
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/*static_assert(offsetof(g_imm_table_struct, cntb_table) == 0, "offsetof(cntb_table) != 0");
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for (u32 i = 0; i < sizeof(cntb_table) / sizeof(cntb_table[0]); i++)
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{
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u32 cnt_low = 0, cnt_high = 0;
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for (u32 j = 0; j < 8; j++)
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{
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cnt_low += (i >> j) & 1;
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cnt_high += (i >> (j + 8)) & 1;
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}
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cntb_table[i] = (cnt_high << 8) | cnt_low;
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}*/
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for (u32 i = 0; i < sizeof(fsm_table) / sizeof(fsm_table[0]); i++)
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{
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for (u32 j = 0; j < 4; j++) mmToU32Ptr(fsm_table[i])[j] = (i & (1 << j)) ? ~0 : 0;
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}
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for (u32 i = 0; i < sizeof(fsmh_table) / sizeof(fsmh_table[0]); i++)
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{
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for (u32 j = 0; j < 8; j++) mmToU16Ptr(fsmh_table[i])[j] = (i & (1 << j)) ? ~0 : 0;
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}
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for (u32 i = 0; i < sizeof(fsmb_table) / sizeof(fsmb_table[0]); i++)
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{
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for (u32 j = 0; j < 16; j++) mmToU8Ptr(fsmb_table[i])[j] = (i & (1 << j)) ? ~0 : 0;
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}
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for (u32 i = 0; i < sizeof(sldq_pshufb) / sizeof(sldq_pshufb[0]); i++)
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{
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for (u32 j = 0; j < 16; j++) mmToU8Ptr(sldq_pshufb[i])[j] = (u8)(j - i);
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}
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for (u32 i = 0; i < sizeof(srdq_pshufb) / sizeof(srdq_pshufb[0]); i++)
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{
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for (u32 j = 0; j < 16; j++) mmToU8Ptr(srdq_pshufb[i])[j] = (j + i > 15) ? 0xff : (u8)(j + i);
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}
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for (u32 i = 0; i < sizeof(rldq_pshufb) / sizeof(rldq_pshufb[0]); i++)
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{
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for (u32 j = 0; j < 16; j++) mmToU8Ptr(rldq_pshufb[i])[j] = (u8)(j - i) & 0xf;
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}
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}
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};
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extern const g_imm_table_struct g_imm_table;
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//Floating point status and control register. Unsure if this is one of the GPRs or SPRs
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//Is 128 bits, but bits 0-19, 24-28, 32-49, 56-60, 64-81, 88-92, 96-115, 120-124 are unused
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class FPSCR
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@ -451,7 +511,7 @@ public:
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void WriteLS128(const u32 lsa, const u128& data) const { vm::write128(lsa + m_offset, data); }
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std::function<void(SPUThread& SPU)> m_custom_task;
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std::function<u32(SPUThread& SPU)> m_code3_func;
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std::function<u64(SPUThread& SPU)> m_code3_func;
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public:
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SPUThread(CPUThreadType type = CPU_THREAD_SPU);
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@ -170,13 +170,138 @@ s64 spursInit(
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SPU.GPR[4]._u64[1] = spurs.addr();
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return SPU.FastCall(SPU.PC);
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#endif
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//SPU.WriteLS32(0x808, 2); // hack for cellSpursModuleExit
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//SPU.WriteLS32(0x260, 3); // hack for cellSpursModulePollStatus
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//SPU.WriteLS32(0x264, 0x35000000); // bi $0
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SPU.WriteLS32(SPU.ReadLS32(0x1e0), 2); // hack for cellSpursModuleExit
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/*if (!isSecond)*/ SPU.m_code3_func = [spurs, num](SPUThread& SPU) -> u64 // first variant
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{
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LV2_LOCK(0);
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const u32 arg1 = SPU.GPR[3]._u32[3];
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u32 var0 = SPU.ReadLS32(0x1d8);
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u32 var1 = SPU.ReadLS32(0x1dc);
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u128 wklA = vm::read128(spurs.addr() + 0x20);
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u128 wklB = vm::read128(spurs.addr() + 0x30);
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u128 savedA = SPU.ReadLS128(0x180);
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u128 savedB = SPU.ReadLS128(0x190);
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u128 vAA; vAA.vi = _mm_sub_epi32(wklA.vi, savedA.vi);
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u128 vBB; vBB.vi = _mm_sub_epi32(wklB.vi, savedB.vi);
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u128 vAABB; vAABB.vi = (arg1 == 0) ? _mm_add_epi32(vAA.vi, _mm_andnot_si128(g_imm_table.fsmb_table[0x8000 >> var1], vBB.vi)) : vAA.vi;
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u32 vNUM = 0x20;
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u64 vRES = 0x20ull << 32;
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u128 vSET = {};
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if (spurs->m.x72.read_relaxed() & (1 << num))
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{
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SPU.WriteLS8(0x1eb, 0); // var4
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if (arg1 && var1 != 0x20)
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{
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spurs->m.x72._and_not(1 << num);
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}
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}
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else
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{
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u128 wklReadyCount0 = vm::read128(spurs.addr() + 0x0);
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u128 wklReadyCount1 = vm::read128(spurs.addr() + 0x10);
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u128 savedC = SPU.ReadLS128(0x1A0);
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u128 savedD = SPU.ReadLS128(0x1B0);
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u128 vRC; vRC.vi = _mm_add_epi32(_mm_min_epu8(wklReadyCount0.vi, _mm_set1_epi8(8)), _mm_min_epu8(wklReadyCount1.vi, _mm_set1_epi8(8)));
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u32 wklFlag = spurs->m.wklFlag.flag.read_relaxed();
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u32 flagRecv = spurs->m.flagRecv.read_relaxed();
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u128 vFM; vFM.vi = g_imm_table.fsmb_table[wklFlag == 0 ? 0x8000 >> flagRecv : 0];
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u128 wklSet1; wklSet1.vi = g_imm_table.fsmb_table[spurs->m.wklSet1.read_relaxed()];
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u128 vFMS1; vFMS1.vi = vFM.vi | wklSet1.vi;
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u128 vFMV1; vFMV1.vi = g_imm_table.fsmb_table[(wklFlag == 0 ? 0x8000 >> flagRecv : 0) >> var1];
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u32 var5 = SPU.ReadLS32(0x1ec);
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u128 wklMinCnt = vm::read128(spurs.addr() + 0x40);
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u128 wklMaxCnt = vm::read128(spurs.addr() + 0x50);
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u128 vCC; vCC.vi = _mm_andnot_si128(vFMS1.vi,
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_mm_cmpeq_epi8(wklReadyCount0.vi, _mm_set1_epi8(0)) | _mm_cmple_epu8(vRC.vi, vAABB.vi)) |
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_mm_cmple_epu8(wklMaxCnt.vi, vAABB.vi) |
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_mm_cmpeq_epi8(savedC.vi, _mm_set1_epi8(0)) |
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g_imm_table.fsmb_table[(~var5) >> 16];
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u128 vCCH1; vCCH1.vi = _mm_andnot_si128(vCC.vi,
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_mm_set1_epi8((char)0x80) & (vFMS1.vi | _mm_cmpgt_epu8(wklReadyCount0.vi, vAABB.vi)) |
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_mm_set1_epi8(0x7f) & savedC.vi);
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u128 vCCL1; vCCL1.vi = _mm_andnot_si128(vCC.vi,
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_mm_set1_epi8((char)0x80) & vFMV1.vi |
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_mm_set1_epi8(0x40) & _mm_cmpgt_epu8(vAABB.vi, _mm_set1_epi8(0)) & _mm_cmpgt_epu8(wklMinCnt.vi, vAABB.vi) |
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_mm_set1_epi8(0x3c) & _mm_slli_epi32(_mm_sub_epi32(_mm_set1_epi8(8), vAABB.vi), 2) |
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_mm_set1_epi8(0x02) & _mm_cmpeq_epi8(savedD.vi, _mm_set1_epi8((s8)var0)) |
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_mm_set1_epi8(0x01));
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u128 vSTAT; vSTAT.vi =
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_mm_set1_epi8(0x01) & _mm_cmpgt_epu8(wklReadyCount0.vi, vAABB.vi) |
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_mm_set1_epi8(0x02) & wklSet1.vi |
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_mm_set1_epi8(0x04) & vFM.vi;
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for (s32 i = 0, max = -1; i < 0x10; i++)
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{
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const s32 value = ((s32)vCCH1.u8r[i] << 8) | ((s32)vCCL1.u8r[i]);
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if (value > max && (vCC.u8r[i] & 1) == 0)
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{
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vNUM = i;
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max = value;
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}
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}
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if (vNUM < 0x10)
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{
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vRES == ((u64)vNUM << 32) | vSTAT.u8r[vNUM];
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vSET.u8r[vNUM] = 0x01;
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}
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|
||||
SPU.WriteLS8(0x1eb, vNUM == 0x20);
|
||||
|
||||
if (!arg1 || var1 == vNUM)
|
||||
{
|
||||
spurs->m.wklSet1._and_not(be_t<u16>::make(0x8000 >> vNUM));
|
||||
}
|
||||
|
||||
if (vNUM == flagRecv)
|
||||
{
|
||||
spurs->m.wklFlag.flag |= be_t<u32>::make(-1);
|
||||
}
|
||||
}
|
||||
|
||||
if (arg1 == 0)
|
||||
{
|
||||
vAA.vi = _mm_add_epi32(vAA.vi, vSET.vi);
|
||||
vm::write128(spurs.addr() + 0x20, vAA); // update wklA
|
||||
|
||||
SPU.WriteLS128(0x180, vSET); // update savedA
|
||||
SPU.WriteLS32(0x1dc, vNUM); // update var1
|
||||
}
|
||||
|
||||
if (arg1 == 1 && vNUM != var1)
|
||||
{
|
||||
vBB.vi = _mm_add_epi32(vBB.vi, vSET.vi);
|
||||
vm::write128(spurs.addr() + 0x30, vBB); // update wklB
|
||||
|
||||
SPU.WriteLS128(0x190, vSET); // update savedB
|
||||
}
|
||||
else
|
||||
{
|
||||
SPU.WriteLS128(0x190, {}); // update savedB
|
||||
}
|
||||
|
||||
return vRES;
|
||||
};
|
||||
//else SPU.m_code3_func = [spurs, num](SPUThread& SPU) -> u64 // second variant
|
||||
//{
|
||||
//
|
||||
//};
|
||||
|
||||
if (SPU.m_code3_func)
|
||||
{
|
||||
const u32 addr = SPU.ReadLS32(0x1e4);
|
||||
SPU.WriteLS32(addr + 0, 3); // hack for cellSpursModulePollStatus
|
||||
SPU.WriteLS32(addr + 4, 0x35000000); // bi $0
|
||||
}
|
||||
|
||||
SPU.WriteLS128(0x1c0, u128::from32r(0, spurs.addr(), num, 0x1f));
|
||||
|
||||
u32 wid = 0x20;
|
||||
u32 stat = 0;
|
||||
while (true)
|
||||
{
|
||||
if (Emu.IsStopped())
|
||||
@ -199,11 +324,19 @@ s64 spursInit(
|
||||
if (!isSecond) SPU.WriteLS16(0x1e8, 0);
|
||||
|
||||
// run workload:
|
||||
SPU.GPR[1]._u32[3] = 0x3FFB0;
|
||||
SPU.GPR[3]._u32[3] = 0x100;
|
||||
SPU.GPR[4]._u64[1] = wkl.data;
|
||||
SPU.GPR[5]._u32[3] = 0;
|
||||
SPU.FastCall(0xa00);
|
||||
if (wid <= 0x20)
|
||||
{
|
||||
SPU.GPR[1]._u32[3] = 0x3FFB0;
|
||||
SPU.GPR[3]._u32[3] = 0x100;
|
||||
SPU.GPR[4]._u64[1] = wkl.data;
|
||||
SPU.GPR[5]._u32[3] = stat;
|
||||
SPU.FastCall(0xa00);
|
||||
}
|
||||
else
|
||||
{
|
||||
// hack
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(1));
|
||||
}
|
||||
|
||||
// check status:
|
||||
auto status = SPU.SPU.Status.GetValue();
|
||||
@ -217,8 +350,19 @@ s64 spursInit(
|
||||
}
|
||||
|
||||
// get workload id:
|
||||
//SPU.GPR[3].clear();
|
||||
//wid = SPU.m_code3_func(SPU);
|
||||
SPU.GPR[3].clear();
|
||||
if (SPU.m_code3_func)
|
||||
{
|
||||
u64 res = SPU.m_code3_func(SPU);
|
||||
stat = (u32)(res);
|
||||
wid = (u32)(res >> 32);
|
||||
}
|
||||
else
|
||||
{
|
||||
SPU.FastCall(0x290);
|
||||
stat = SPU.GPR[3]._u32[2];
|
||||
wid = SPU.GPR[3]._u32[3];
|
||||
}
|
||||
}
|
||||
|
||||
})->GetId();
|
||||
|
||||
Loading…
Reference in New Issue
Block a user