RPCS3/rpcs3
1
0
Fork 0
mirror of https://github.com/RPCS3/rpcs3.git synced 2024-11-22 10:42:36 +01:00
Code Issues Releases Wiki Activity

SPU LLVM: fix AND instruction family (#9290)

Browse Source 
Incorrect immediate test (looks like copypasta)
This commit is contained in:
Eladash 2020-11-18 13:36:26 +02:00 committed by GitHub
parent 0e7a705254
commit 28cbba5a7d
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
rpcs3/Emu/Cell/SPURecompiler.cpp
View File

@ -6949,19 +6949,19 @@ public:
void ANDI(spu_opcode_t op)
{
if (!m_interp_magn && !op.si10) return set_vr(op.rt, get_vr(op.ra));
if (!m_interp_magn && op.si10 == -1) return set_vr(op.rt, get_vr(op.ra));
set_vr(op.rt, get_vr<s32[4]>(op.ra) & get_imm<s32[4]>(op.si10));
}
void ANDHI(spu_opcode_t op)
{
if (!m_interp_magn && !op.si10) return set_vr(op.rt, get_vr(op.ra));
if (!m_interp_magn && op.si10 == -1) return set_vr(op.rt, get_vr(op.ra));
set_vr(op.rt, get_vr<s16[8]>(op.ra) & get_imm<s16[8]>(op.si10));
}
void ANDBI(spu_opcode_t op)
{
if (!m_interp_magn && !op.si10) return set_vr(op.rt, get_vr(op.ra));
if (!m_interp_magn && static_cast<s8>(op.si10) == -1) return set_vr(op.rt, get_vr(op.ra));
set_vr(op.rt, get_vr<s8[16]>(op.ra) & get_imm<s8[16]>(op.si10));
}