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TSX/PPU: fix conditional store regression

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This commit is contained in:
Nekotekina 2021-12-17 21:48:01 +03:00
parent 18f59d3be8
commit 3e1e1a683c
2 changed files with 3 additions and 4 deletions
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3
rpcs3/Emu/Cell/PPUThread.cpp
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@ -2339,7 +2339,7 @@ static bool ppu_store_reservation(ppu_thread& ppu, u32 addr, u64 reg_value)
// Aligned 8-byte reservations will be used here
addr &= -8;
const u64 lock_bits = g_cfg.core.spu_accurate_dma ? vm::rsrv_unique_lock : 1;
const u64 lock_bits = vm::rsrv_unique_lock;
auto [_oldd, _ok] = res.fetch_op([&](u64& r)
{
@ -2348,7 +2348,6 @@ static bool ppu_store_reservation(ppu_thread& ppu, u32 addr, u64 reg_value)
return false;
}
// Despite using shared lock, doesn't allow other shared locks (TODO)
r += lock_bits;
return true;
});

4
rpcs3/Emu/Cell/SPUThread.cpp
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@ -1705,7 +1705,7 @@ void spu_thread::cpu_work()
gen_interrupt = check_mfc_interrupts(pc);
work_left |= interrupts_enabled;
}
in_cpu_work = false;
if (!work_left)
@ -4575,7 +4575,7 @@ bool spu_thread::stop_and_signal(u32 code)
spu_function_logger logger(*this, "sys_spu_thread_receive_event");
std::shared_ptr<lv2_event_queue> queue;
while (true)
{
// Check group status, wait if necessary