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Savestates/RSX: Restore the ZCULL control state
And fix the ZCULL control state at the initial state of RSX.
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parent
786510a937
commit
4ade06f36f
@ -451,10 +451,17 @@ namespace rsx
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ar(dma_address, iomap_table, restore_point, tiles, zculls, display_buffers, display_buffers_count, current_display_buffer);
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ar(enable_second_vhandler, requested_vsync);
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ar(device_addr, label_addr, main_mem_size, local_mem_size, rsx_event_port, driver_info);
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ar(in_begin_end, zcull_stats_enabled, zcull_rendering_enabled, zcull_pixel_cnt_enabled);
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ar(in_begin_end);
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if (!ar.is_writing() && GET_SERIALIZATION_VERSION(rsx) <= 2)
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{
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// Used to be ZCULL information we can obtain by reading method registers
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ar.pos += 3;
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}
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ar(display_buffers, display_buffers_count, current_display_buffer);
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if (ar.is_writing() || GET_SERIALIZATION_VERSION(rsx) != 1u)
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if (ar.is_writing() || GET_SERIALIZATION_VERSION(rsx) != 1)
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{
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ar(unsent_gcm_events);
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ar(rsx::method_registers.current_draw_clause);
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@ -697,6 +704,11 @@ namespace rsx
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}
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}
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namespace nv4097
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{
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void set_render_mode(thread* rsx, u32, u32 arg);
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}
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void thread::on_task()
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{
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g_tls_log_prefix = []
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@ -721,6 +733,9 @@ namespace rsx
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zcull_ctrl = std::make_unique<::rsx::reports::ZCULL_control>();
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}
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check_zcull_status(false);
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nv4097::set_render_mode(this, 0, method_registers.registers[NV4097_SET_RENDER_ENABLE]);
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performance_counters.state = FIFO_state::empty;
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Emu.CallFromMainThread([]{ Emu.RunPPU(); });
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@ -2295,6 +2310,8 @@ namespace rsx
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void thread::reset()
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{
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rsx::method_registers.reset();
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check_zcull_status(false);
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nv4097::set_render_mode(this, 0, method_registers.registers[NV4097_SET_RENDER_ENABLE]);
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m_graphics_state = pipeline_state::all_dirty;
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m_rtts_dirty = true;
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m_framebuffer_state_contested = false;
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@ -2637,6 +2654,10 @@ namespace rsx
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void thread::check_zcull_status(bool framebuffer_swap)
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{
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const bool zcull_rendering_enabled = !!method_registers.registers[NV4097_SET_ZCULL_EN];
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const bool zcull_stats_enabled = !!method_registers.registers[NV4097_SET_ZCULL_STATS_ENABLE];
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const bool zcull_pixel_cnt_enabled = !!method_registers.registers[NV4097_SET_ZPASS_PIXEL_COUNT_ENABLE];
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if (framebuffer_swap)
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{
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zcull_surface_active = false;
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@ -671,10 +671,6 @@ namespace rsx
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atomic_t<s32> async_tasks_pending{ 0 };
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bool zcull_stats_enabled = false;
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bool zcull_rendering_enabled = false;
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bool zcull_pixel_cnt_enabled = false;
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reports::conditional_render_eval cond_render_ctrl;
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virtual u64 get_cycles() = 0;
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@ -745,19 +745,16 @@ namespace rsx
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void set_zcull_render_enable(thread* rsx, u32, u32 arg)
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{
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rsx->zcull_rendering_enabled = !!arg;
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rsx->notify_zcull_info_changed();
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}
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void set_zcull_stats_enable(thread* rsx, u32, u32 arg)
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{
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rsx->zcull_stats_enabled = !!arg;
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rsx->notify_zcull_info_changed();
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}
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void set_zcull_pixel_count_enable(thread* rsx, u32, u32 arg)
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{
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rsx->zcull_pixel_cnt_enabled = !!arg;
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rsx->notify_zcull_info_changed();
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}
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@ -1789,8 +1786,6 @@ namespace rsx
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}
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rsx->reset();
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nv4097::set_zcull_render_enable(rsx, 0, 0x3);
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nv4097::set_render_mode(rsx, 0, 0x0100'0000);
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rsx->on_frame_end(arg);
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rsx->request_emu_flip(arg);
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vm::_ref<atomic_t<u128>>(rsx->label_addr + 0x10).store(u128{});
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@ -75,7 +75,7 @@ static std::array<serial_ver_t, 23> s_serial_versions;
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#define SERIALIZATION_VER(name, identifier, ...) \
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\
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const bool s_##name##_serialization_fill = []() { ::s_serial_versions[identifier].compatible_versions = {__VA_ARGS__}; return true; }();\
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const bool s_##name##_serialization_fill = []() { if (::s_serial_versions[identifier].compatible_versions.empty()) ::s_serial_versions[identifier].compatible_versions = {__VA_ARGS__}; return true; }();\
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\
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extern void using_##name##_serialization()\
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{\
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@ -101,7 +101,7 @@ SERIALIZATION_VER(lv2_config, 9, 1)
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namespace rsx
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{
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SERIALIZATION_VER(rsx, 10, 1, 2)
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SERIALIZATION_VER(rsx, 10, 1, 2, 3)
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}
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namespace np
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@ -111,8 +111,8 @@ namespace np
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#ifdef _MSC_VER
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// Compiler bug, lambda function body does seem to inherit used namespace atleast for function decleration
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SERIALIZATION_VER(rsx, 10, 1, 2)
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SERIALIZATION_VER(sceNp, 11, 1)
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SERIALIZATION_VER(rsx, 10)
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SERIALIZATION_VER(sceNp, 11)
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#endif
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SERIALIZATION_VER(cellVdec, 12, 1)
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