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This commit is contained in:
scribam 2017-12-01 21:11:06 +01:00 committed by Ivan
parent b4a97c99d8
commit 50f2be57f7
8 changed files with 53 additions and 52 deletions
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2
rpcs3/Emu/Cell/RawSPUThread.cpp
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@ -21,7 +21,7 @@ void RawSPUThread::cpu_task()
SPUThread::cpu_task();
// save next PC and current SPU Interrupt status
npc = pc | (interrupts_enabled);
npc = pc | (interrupts_enabled);
}
void RawSPUThread::on_init(const std::shared_ptr<void>& _this)

43
rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp
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@ -290,27 +290,28 @@ inline asmjit::X86Mem spu_recompiler::XmmConst(__m128i data)
void spu_recompiler::CheckInterruptStatus(spu_opcode_t op)
{
if (op.d)
c->lock().btr(SPU_OFF_8(interrupts_enabled), 0);
else if (op.e) {
c->lock().bts(SPU_OFF_8(interrupts_enabled), 0);
c->mov(*qw0, SPU_OFF_32(ch_event_stat));
c->and_(*qw0, SPU_OFF_32(ch_event_mask));
c->and_(*qw0, SPU_EVENT_INTR_TEST);
c->cmp(*qw0, 0);
asmjit::Label noInterrupt = c->newLabel();
c->je(noInterrupt);
c->lock().btr(SPU_OFF_8(interrupts_enabled), 0);
c->mov(SPU_OFF_32(srr0), *addr);
c->mov(SPU_OFF_32(pc), 0);
if (op.d)
c->lock().btr(SPU_OFF_8(interrupts_enabled), 0);
else if (op.e)
{
c->lock().bts(SPU_OFF_8(interrupts_enabled), 0);
c->mov(*qw0, SPU_OFF_32(ch_event_stat));
c->and_(*qw0, SPU_OFF_32(ch_event_mask));
c->and_(*qw0, SPU_EVENT_INTR_TEST);
c->cmp(*qw0, 0);
FunctionCall();
asmjit::Label noInterrupt = c->newLabel();
c->je(noInterrupt);
c->lock().btr(SPU_OFF_8(interrupts_enabled), 0);
c->mov(SPU_OFF_32(srr0), *addr);
c->mov(SPU_OFF_32(pc), 0);
c->mov(*addr, SPU_OFF_32(srr0));
c->bind(noInterrupt);
c->unuse(*qw0);
}
FunctionCall();
c->mov(*addr, SPU_OFF_32(srr0));
c->bind(noInterrupt);
c->unuse(*qw0);
}
}
void spu_recompiler::InterpreterCall(spu_opcode_t op)
@ -1038,7 +1039,7 @@ void spu_recompiler::BI(spu_opcode_t op)
{
c->mov(*addr, SPU_OFF_32(gpr, op.ra, &v128::_u32, 3));
c->and_(*addr, 0x3fffc);
CheckInterruptStatus(op);
CheckInterruptStatus(op);
c->jmp(*jt);
}
@ -1062,7 +1063,7 @@ void spu_recompiler::IRET(spu_opcode_t op)
{
c->mov(*addr, SPU_OFF_32(srr0));
c->and_(*addr, 0x3fffc);
CheckInterruptStatus(op);
CheckInterruptStatus(op);
c->jmp(*jt);
}

2
rpcs3/Emu/Cell/SPUASMJITRecompiler.h
View File

@ -78,7 +78,7 @@ private:
asmjit::X86Mem XmmConst(__m128i data);
public:
void CheckInterruptStatus(spu_opcode_t op);
void CheckInterruptStatus(spu_opcode_t op);
void InterpreterCall(spu_opcode_t op);
void FunctionCall();

44
rpcs3/Emu/Cell/SPUAnalyser.cpp
View File

@ -78,8 +78,8 @@ spu_function_t* SPUDatabase::analyse(const be_t<u32>* ls, u32 entry, u32 max_lim
// Minimal position of ila $SP,* instruction
u32 ila_sp_pos = max_limit;
// pigeonhole optimization, addr of last ila r2, addr, or 0 if last instruction was not
u32 ila_r2_addr = 0;
// pigeonhole optimization, addr of last ila r2, addr, or 0 if last instruction was not
u32 ila_r2_addr = 0;
// Find preliminary set of possible block entries (first pass), `start` is the current block address
for (u32 start = entry, pos = entry; pos < limit; pos += 4)
@ -177,18 +177,18 @@ spu_function_t* SPUDatabase::analyse(const be_t<u32>* ls, u32 entry, u32 max_lim
break;
}
// if upcoming instruction is not BI, reset the pigeonhole optimization
// todo: can constant propogation somewhere get rid of this check?
if ((type != BI))
ila_r2_addr = 0; // reset
// if upcoming instruction is not BI, reset the pigeonhole optimization
// todo: can constant propogation somewhere get rid of this check?
if ((type != BI))
ila_r2_addr = 0; // reset
if (type == BI || type == IRET) // Branch Indirect
{
blocks.emplace(start);
start = pos + 4;
if (op.ra == 2 && ila_r2_addr > entry)
blocks.emplace(ila_r2_addr);
if (op.ra == 2 && ila_r2_addr > entry)
blocks.emplace(ila_r2_addr);
}
else if (type == BR || type == BRA) // Branch Relative/Absolute
{
@ -244,13 +244,13 @@ spu_function_t* SPUDatabase::analyse(const be_t<u32>* ls, u32 entry, u32 max_lim
blocks.emplace(target);
}
}
else if (type == LNOP || type == NOP) {
// theres a chance that theres some random lnops/nops after the end of a function
// havent found a definite pattern, but, is an easy optimization to check for, just push start down if lnop is tagged as a start
// todo: remove the last added start pos as its probly unnecessary
if (pos == start)
start = pos + 4;
}
else if (type == LNOP || type == NOP) {
// theres a chance that theres some random lnops/nops after the end of a function
// havent found a definite pattern, but, is an easy optimization to check for, just push start down if lnop is tagged as a start
// todo: remove the last added start pos as its probly unnecessary
if (pos == start)
start = pos + 4;
}
else // Other instructions (writing rt reg)
{
const u32 rt = type & spu_itype::_quadrop ? +op.rt4 : +op.rt;
@ -268,13 +268,13 @@ spu_function_t* SPUDatabase::analyse(const be_t<u32>* ls, u32 entry, u32 max_lim
ila_sp_pos = pos;
}
}
// pigeonhole optimize
// ila r2, addr
// bi r2
else if (rt == 2) {
if (type == ILA)
ila_r2_addr = spu_branch_target(op.i18);
}
// pigeonhole optimize
// ila r2, addr
// bi r2
else if (rt == 2) {
if (type == ILA)
ila_r2_addr = spu_branch_target(op.i18);
}
}
}

2
rpcs3/Emu/Cell/SPUInterpreter.cpp
View File

@ -52,7 +52,7 @@ void spu_interpreter::set_interrupt_status(SPUThread& spu, spu_opcode_t op)
if (spu.interrupts_enabled && (spu.ch_event_mask & spu.ch_event_stat & SPU_EVENT_INTR_IMPLEMENTED) > 0)
{
spu.interrupts_enabled = false;
spu.interrupts_enabled = false;
spu.srr0 = std::exchange(spu.pc, -4) + 4;
}
}

2
rpcs3/Emu/Cell/SPURecompiler.cpp
View File

@ -88,7 +88,7 @@ void spu_recompiler_base::enter(SPUThread& spu)
if (spu.interrupts_enabled && (spu.ch_event_mask & spu.ch_event_stat & SPU_EVENT_INTR_IMPLEMENTED) > 0)
{
spu.interrupts_enabled = false;
spu.interrupts_enabled = false;
spu.srr0 = std::exchange(spu.pc, 0);
}
}

8
rpcs3/Emu/Cell/SPUThread.cpp
View File

@ -292,7 +292,7 @@ void SPUThread::cpu_init()
ch_event_mask = 0;
ch_event_stat = 0;
interrupts_enabled = false;
interrupts_enabled = false;
raddr = 0;
ch_dec_start_timestamp = get_timebased_time(); // ???
@ -975,11 +975,11 @@ void SPUThread::set_interrupt_status(bool enable)
{
fmt::throw_exception("SPU Interrupts not implemented (mask=0x%x)" HERE, mask);
}
interrupts_enabled = true;
interrupts_enabled = true;
}
else
{
interrupts_enabled = false;
interrupts_enabled = false;
}
}
@ -1165,7 +1165,7 @@ bool SPUThread::get_ch_value(u32 ch, u32& out)
{
// HACK: "Not isolated" status
// Return SPU Interrupt status in LSB
out = interrupts_enabled == true;
out = interrupts_enabled == true;
return true;
}
}

2
rpcs3/Emu/Cell/SPUThread.h
View File

@ -562,7 +562,7 @@ public:
atomic_t<u32> ch_event_mask;
atomic_t<u32> ch_event_stat;
atomic_t<bool> interrupts_enabled;
atomic_t<bool> interrupts_enabled;
u64 ch_dec_start_timestamp; // timestamp of writing decrementer value
u32 ch_dec_value; // written decrementer value