mirror of
https://github.com/RPCS3/rpcs3.git
synced 2024-11-26 04:32:35 +01:00
Fix opcodes STR/SFL for both VP and FP
This commit is contained in:
parent
650c5155df
commit
59628960b6
@ -293,8 +293,8 @@ void GLFragmentDecompilerThread::Task()
|
||||
//case 0x1e: break; // LIT (compute light coefficients)
|
||||
case 0x1f: AddCode("(" + GetSRC(src0) + " * (" + GetSRC(src1) + " - " + GetSRC(src2) + ") +" + GetSRC(src2) + ")"); break; // LRP (linear interpolation)
|
||||
|
||||
case 0x20: AddCode("vec4(1.0)"); break; // STR (set on true)
|
||||
case 0x21: AddCode("vec4(0.0)"); break; // SFL (set on false)
|
||||
case 0x20: AddCode("vec4(equal(" + GetSRC(src0) + ", vec4(1)))"); break; // STR (set on true)
|
||||
case 0x21: AddCode("vec4(equal(" + GetSRC(src0) + ", vec4(0)))"); break; // SFL (set on false)
|
||||
case 0x22: AddCode("cos(" + GetSRC(src0) + ")"); break; // COS
|
||||
case 0x23: AddCode("sin(" + GetSRC(src0) + ")"); break; // SIN
|
||||
//case 0x24: break; // PK2 (pack two 16-bit floats)
|
||||
@ -326,7 +326,7 @@ void GLFragmentDecompilerThread::Task()
|
||||
case 0x3e: break; // FENCB
|
||||
|
||||
default:
|
||||
ConLog.Error("Unknown opcode 0x%x (inst %d)", opcode, m_size / (4 * 4));
|
||||
ConLog.Error("Unknown fp opcode 0x%x (inst %d)", opcode, m_size / (4 * 4));
|
||||
//Emu.Pause();
|
||||
break;
|
||||
}
|
||||
|
@ -411,11 +411,11 @@ void GLVertexDecompilerThread::Task()
|
||||
case 0x0e: AddVecCode("fract(" + GetSRC(0) + ")"); break; //FRC
|
||||
case 0x0f: AddVecCode("floor(" + GetSRC(0) + ")"); break; //FLR
|
||||
case 0x10: AddVecCode("vec4(equal(" + GetSRC(0) + ", " + GetSRC(1) + "))"); break; //SEQ
|
||||
//case 0x11: AddVecCode("vec4(equal(" + GetSRC(0) + ", vec4(0, 0, 0, 0)))"); break; //SFL
|
||||
case 0x11: AddVecCode("vec4(equal(" + GetSRC(0) + ", vec4(0)))"); break; //SFL
|
||||
case 0x12: AddVecCode("vec4(greaterThan(" + GetSRC(0) + ", " + GetSRC(1) + "))"); break; //SGT
|
||||
case 0x13: AddVecCode("vec4(lessThanEqual(" + GetSRC(0) + ", " + GetSRC(1) + "))"); break; //SLE
|
||||
case 0x14: AddVecCode("vec4(notEqual(" + GetSRC(0) + ", " + GetSRC(1) + "))"); break; //SNE
|
||||
//case 0x15: AddVecCode("vec4(notEqual(" + GetSRC(0) + ", vec4(0, 0, 0, 0)))"); break; //STR
|
||||
case 0x15: AddVecCode("vec4(equal(" + GetSRC(0) + ", vec4(1)))"); break; //STR
|
||||
case 0x16: AddVecCode("sign(" + GetSRC(0) + ")"); break; //SSG
|
||||
|
||||
default:
|
||||
|
Loading…
Reference in New Issue
Block a user