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SPU LLVM: Enable PUTLLC16 if accurate reservations is off
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@ -7133,8 +7133,9 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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value.reg2 = pattern.reg2;
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}
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if (true)
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if (g_cfg.core.spu_accurate_reservations)
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{
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// Because enabling it is a hack, as it turns out
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continue;
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}
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@ -1196,7 +1196,7 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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if (g_cfg.core.rsx_accurate_res_access)
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{
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call("spu_putllc16_rsx_res", +[](spu_thread* _spu, u32 ls_dst, u32 lsa, u32 eal, u32 notify)
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const auto success = call("spu_putllc16_rsx_res", +[](spu_thread* _spu, u32 ls_dst, u32 lsa, u32 eal, u32 notify) -> bool
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{
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const u32 raddr = eal;
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@ -1207,71 +1207,53 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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const auto _dest = vm::get_super_ptr<atomic_t<nse_t<v128>>>(dest);
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using spu_rdata_t = decltype(spu_thread::rdata);
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extern bool cmp_rdata(const spu_rdata_t& _lhs, const spu_rdata_t& _rhs);
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// if (!cmp_rdata(*reinterpret_cast<const decltype(_spu->rdata)*>(_dest), _spu->rdata))
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// {
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// _spu->ch_atomic_stat.set_value(MFC_PUTLLC_FAILURE);
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// _spu->set_events(SPU_EVENT_LR);
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// _spu->raddr = 0;
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// return;
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// }
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if (rdata == to_write || ((lsa ^ ls_dst) & (SPU_LS_SIZE - 128)))
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{
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vm::reservation_update(raddr);
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_spu->ch_atomic_stat.set_value(MFC_PUTLLC_SUCCESS);
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_spu->raddr = 0;
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return;
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return true;
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}
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const u64 rtime = _spu->rtime;
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auto& res = vm::reservation_acquire(eal);
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if (res != rtime)
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if (res % 128)
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{
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_spu->ch_atomic_stat.set_value(MFC_PUTLLC_FAILURE);
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_spu->set_events(SPU_EVENT_LR);
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_spu->raddr = 0;
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return;
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return false;
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}
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rsx::reservation_lock rsx_lock(raddr, 128);
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// Touch memory
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utils::trigger_write_page_fault(vm::base(dest ^ (4096 / 2)));
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auto [old_res, ok] = res.fetch_op([&](u64& rval)
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{
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if (rtime != rval)
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rsx::reservation_lock rsx_lock(raddr, 128);
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// Touch memory
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utils::trigger_write_page_fault(vm::base(dest ^ (4096 / 2)));
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auto [old_res, ok] = res.fetch_op([&](u64& rval)
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{
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if (rval % 128)
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{
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return false;
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}
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rval |= 127;
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return true;
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});
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if (!ok)
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{
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return false;
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}
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rval |= 127;
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return true;
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});
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if (!_dest->compare_and_swap_test(rdata, to_write))
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{
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res.release(old_res);
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return false;
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}
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if (!ok)
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{
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_spu->ch_atomic_stat.set_value(MFC_PUTLLC_FAILURE);
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_spu->set_events(SPU_EVENT_LR);
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_spu->raddr = 0;
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return;
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// Success
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res.release(old_res + 128);
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}
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if (!_dest->compare_and_swap_test(rdata, to_write))
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{
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res.release(old_res);
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_spu->ch_atomic_stat.set_value(MFC_PUTLLC_FAILURE);
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_spu->set_events(SPU_EVENT_LR);
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_spu->raddr = 0;
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return;
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}
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// Success
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res.release(old_res + 128);
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_spu->ch_atomic_stat.set_value(MFC_PUTLLC_SUCCESS);
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_spu->raddr = 0;
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@ -1279,10 +1261,12 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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{
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res.notify_all();
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}
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return true;
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}, m_thread, dest, _lsa, _eal, m_ir->getInt32(!info.no_notify));
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m_ir->CreateBr(_final);
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m_ir->CreateCondBr(success, _final, _fail);
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m_ir->SetInsertPoint(_fail);
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call("PUTLLC16_fail", +on_fail, m_thread, _eal);
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