mirror of
https://github.com/RPCS3/rpcs3.git
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SPU: add some AVX-512 variants
This commit is contained in:
Nekotekina
parent
4aee4ed6d7
commit
6d34dcd75f
@ -19,6 +19,12 @@ bool utils::has_avx()
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return g_value;
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}
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bool utils::has_avx2()
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{
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static const bool g_value = get_cpuid(0, 0)[0] >= 0x7 && get_cpuid(7, 0)[1] & 0x20;
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return g_value;
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}
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bool utils::has_rtm()
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{
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// Check RTM and MPX extensions in order to filter out TSX on Haswell CPUs
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@ -26,6 +32,13 @@ bool utils::has_rtm()
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return g_value;
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}
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bool utils::has_512()
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{
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// Check AVX512F, AVX512CD, AVX512DQ, AVX512BW, AVX512VL extensions (Skylake-X level support)
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static const bool g_value = get_cpuid(0, 0)[0] >= 0x7 && (get_cpuid(7, 0)[1] & 0xd0030000) == 0xd0030000;
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return g_value;
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}
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std::string utils::get_system_info()
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{
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std::string result;
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@ -68,7 +81,17 @@ std::string utils::get_system_info()
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if (has_avx())
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{
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result += " | AVX+";
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result += " | AVX";
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if (has_avx2())
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{
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result += '+';
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}
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if (has_512())
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{
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result += '+';
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}
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}
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if (has_rtm())
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@ -8,11 +8,11 @@ namespace utils
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inline std::array<u32, 4> get_cpuid(u32 func, u32 subfunc)
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{
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int regs[4];
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#ifdef _MSC_VER
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#ifdef _MSC_VER
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__cpuidex(regs, func, subfunc);
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#else
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#else
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__asm__ volatile("cpuid" : "=a" (regs[0]), "=b" (regs[1]), "=c" (regs[2]), "=d" (regs[3]) : "a" (func), "c" (subfunc));
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#endif
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#endif
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return {0u+regs[0], 0u+regs[1], 0u+regs[2], 0u+regs[3]};
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}
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@ -20,8 +20,12 @@ namespace utils
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bool has_avx();
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bool has_avx2();
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bool has_rtm();
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bool has_512();
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inline bool transaction_enter()
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{
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while (true)
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2
asmjit
2
asmjit
@ -1 +1 @@
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Subproject commit 1370fe6a26a82f18500faedac66798953961a916
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Subproject commit 673dcefaa048c5f5a2bf8b85daf8f7b9978d018a
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@ -113,6 +113,13 @@ void spu_recompiler::compile(spu_function_t& f)
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vec.at(i) = vec_vars.data() + i;
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}
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compiler.alloc(vec_vars[0], asmjit::x86::xmm0);
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compiler.alloc(vec_vars[1], asmjit::x86::xmm1);
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compiler.alloc(vec_vars[2], asmjit::x86::xmm2);
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compiler.alloc(vec_vars[3], asmjit::x86::xmm3);
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compiler.alloc(vec_vars[4], asmjit::x86::xmm4);
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compiler.alloc(vec_vars[5], asmjit::x86::xmm5);
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// Initialize labels
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std::vector<Label> pos_labels{ 0x10000 };
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this->labels = pos_labels.data();
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@ -562,6 +569,16 @@ void spu_recompiler::ABSDB(spu_opcode_t op)
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void spu_recompiler::ROT(spu_opcode_t op)
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{
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if (utils::has_512())
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{
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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const XmmLink& vb = XmmGet(op.rb, XmmType::Int);
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const XmmLink& vt = XmmAlloc();
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c->vprolvd(vt, va, vb);
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c->movdqa(SPU_OFF_128(gpr, op.rt), vt);
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return;
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}
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auto body = [](u32* t, const u32* a, const s32* b) noexcept
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{
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for (u32 i = 0; i < 4; i++)
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@ -589,6 +606,18 @@ void spu_recompiler::ROT(spu_opcode_t op)
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void spu_recompiler::ROTM(spu_opcode_t op)
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{
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if (utils::has_512())
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{
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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const XmmLink& vb = XmmGet(op.rb, XmmType::Int);
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const XmmLink& vt = XmmAlloc();
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c->psubd(vb, XmmConst(_mm_set1_epi32(1)));
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c->pandn(vb, XmmConst(_mm_set1_epi32(0x3f)));
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c->vpsrlvd(vt, va, vb);
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c->movdqa(SPU_OFF_128(gpr, op.rt), vt);
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return;
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}
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auto body = [](u32* t, const u32* a, const u32* b) noexcept
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{
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for (u32 i = 0; i < 4; i++)
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@ -617,6 +646,18 @@ void spu_recompiler::ROTM(spu_opcode_t op)
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void spu_recompiler::ROTMA(spu_opcode_t op)
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{
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if (utils::has_512())
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{
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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const XmmLink& vb = XmmGet(op.rb, XmmType::Int);
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const XmmLink& vt = XmmAlloc();
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c->psubd(vb, XmmConst(_mm_set1_epi32(1)));
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c->pandn(vb, XmmConst(_mm_set1_epi32(0x3f)));
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c->vpsravd(vt, va, vb);
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c->movdqa(SPU_OFF_128(gpr, op.rt), vt);
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return;
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}
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auto body = [](s32* t, const s32* a, const u32* b) noexcept
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{
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for (u32 i = 0; i < 4; i++)
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@ -645,6 +686,17 @@ void spu_recompiler::ROTMA(spu_opcode_t op)
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void spu_recompiler::SHL(spu_opcode_t op)
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{
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if (utils::has_512())
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{
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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const XmmLink& vb = XmmGet(op.rb, XmmType::Int);
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const XmmLink& vt = XmmAlloc();
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c->pand(vb, XmmConst(_mm_set1_epi32(0x3f)));
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c->vpsllvd(vt, va, vb);
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c->movdqa(SPU_OFF_128(gpr, op.rt), vt);
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return;
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}
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auto body = [](u32* t, const u32* a, const u32* b) noexcept
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{
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for (u32 i = 0; i < 4; i++)
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@ -672,6 +724,28 @@ void spu_recompiler::SHL(spu_opcode_t op)
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void spu_recompiler::ROTH(spu_opcode_t op) //nf
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{
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if (utils::has_512())
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{
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// Trying to implement 16-bit rotates using 32-bit rotates and only XMM registers.
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// 1) Cannot use YMM/ZMM: transition penalty in mixed code, CPU frequency penalty.
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// 2) Cross-lane instructions like VPMOVZX are expensive.
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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const XmmLink& vb = XmmGet(op.rb, XmmType::Int);
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const XmmLink& v1 = XmmAlloc();
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const XmmLink& v2 = XmmAlloc();
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c->vpunpckhwd(v1, va, va);
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c->vpunpcklwd(v2, va, va);
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c->vpunpckhwd(va, vb, vb);
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c->vpunpcklwd(vb, vb, vb);
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c->vprolvd(va, v1, va);
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c->vprolvd(vb, v2, vb);
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c->psrad(va, 16);
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c->psrad(vb, 16);
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c->packssdw(vb, va);
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c->movdqa(SPU_OFF_128(gpr, op.rt), vb);
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return;
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}
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auto body = [](u16* t, const u16* a, const s16* b) noexcept
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{
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for (u32 i = 0; i < 8; i++)
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@ -699,6 +773,18 @@ void spu_recompiler::ROTH(spu_opcode_t op) //nf
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void spu_recompiler::ROTHM(spu_opcode_t op)
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{
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if (utils::has_512())
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{
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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const XmmLink& vb = XmmGet(op.rb, XmmType::Int);
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const XmmLink& vt = XmmAlloc();
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c->psubw(vb, XmmConst(_mm_set1_epi16(1)));
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c->pandn(vb, XmmConst(_mm_set1_epi16(0x1f)));
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c->vpsrlvw(vt, va, vb);
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c->movdqa(SPU_OFF_128(gpr, op.rt), vt);
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return;
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}
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auto body = [](u16* t, const u16* a, const u16* b) noexcept
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{
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for (u32 i = 0; i < 8; i++)
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@ -727,6 +813,18 @@ void spu_recompiler::ROTHM(spu_opcode_t op)
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void spu_recompiler::ROTMAH(spu_opcode_t op)
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{
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if (utils::has_512())
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{
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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const XmmLink& vb = XmmGet(op.rb, XmmType::Int);
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const XmmLink& vt = XmmAlloc();
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c->psubw(vb, XmmConst(_mm_set1_epi16(1)));
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c->pandn(vb, XmmConst(_mm_set1_epi16(0x1f)));
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c->vpsravw(vt, va, vb);
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c->movdqa(SPU_OFF_128(gpr, op.rt), vt);
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return;
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}
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auto body = [](s16* t, const s16* a, const u16* b) noexcept
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{
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for (u32 i = 0; i < 8; i++)
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@ -755,6 +853,17 @@ void spu_recompiler::ROTMAH(spu_opcode_t op)
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void spu_recompiler::SHLH(spu_opcode_t op)
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{
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if (utils::has_512())
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{
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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const XmmLink& vb = XmmGet(op.rb, XmmType::Int);
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const XmmLink& vt = XmmAlloc();
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c->pand(vb, XmmConst(_mm_set1_epi16(0x1f)));
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c->vpsllvw(vt, va, vb);
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c->movdqa(SPU_OFF_128(gpr, op.rt), vt);
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return;
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}
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auto body = [](u16* t, const u16* a, const u16* b) noexcept
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{
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for (u32 i = 0; i < 8; i++)
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@ -1783,6 +1892,15 @@ void spu_recompiler::HGT(spu_opcode_t op)
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void spu_recompiler::CLZ(spu_opcode_t op)
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{
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if (utils::has_512())
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{
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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const XmmLink& vt = XmmAlloc();
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c->vplzcntd(vt, va);
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c->movdqa(SPU_OFF_128(gpr, op.rt), vt);
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return;
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}
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auto body = [](u32* t, const u32* a) noexcept
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{
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for (u32 i = 0; i < 4; i++)
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@ -3073,6 +3191,14 @@ void spu_recompiler::SELB(spu_opcode_t op)
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{
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const XmmLink& vb = XmmGet(op.rb, XmmType::Int);
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const XmmLink& vc = XmmGet(op.rc, XmmType::Int);
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if (utils::has_512())
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{
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c->vpternlogd(vc, vb, SPU_OFF_128(gpr, op.ra), 0xca /* A?B:C */);
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c->movdqa(SPU_OFF_128(gpr, op.rt4), vc);
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return;
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}
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c->pand(vb, vc);
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c->pandn(vc, SPU_OFF_128(gpr, op.ra));
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c->por(vb, vc);
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@ -3081,6 +3207,30 @@ void spu_recompiler::SELB(spu_opcode_t op)
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void spu_recompiler::SHUFB(spu_opcode_t op)
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{
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if (0 && utils::has_512())
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{
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// Deactivated due to poor performance of mask merge ops.
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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const XmmLink& vb = XmmGet(op.rb, XmmType::Int);
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const XmmLink& vc = XmmGet(op.rc, XmmType::Int);
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const XmmLink& vt = XmmAlloc();
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const XmmLink& vm = XmmAlloc();
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c->vpcmpub(asmjit::x86::k1, vc, XmmConst(_mm_set1_epi8(-0x40)), 5 /* GE */);
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c->vpxor(vm, vc, XmmConst(_mm_set1_epi8(0xf)));
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c->setExtraReg(asmjit::x86::k1);
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c->z().vblendmb(vc, vc, XmmConst(_mm_set1_epi8(-1))); // {k1}
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c->vpcmpub(asmjit::x86::k2, vm, XmmConst(_mm_set1_epi8(-0x20)), 5 /* GE */);
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c->vptestmb(asmjit::x86::k1, vm, XmmConst(_mm_set1_epi8(0x10)));
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c->vpshufb(vt, va, vm);
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c->setExtraReg(asmjit::x86::k2);
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c->z().vblendmb(va, va, XmmConst(_mm_set1_epi8(0x7f))); // {k2}
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c->setExtraReg(asmjit::x86::k1);
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c->vpshufb(vt, vb, vm); // {k1}
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c->vpternlogd(vt, va, vc, 0xf6 /* orAxorBC */);
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c->movdqa(SPU_OFF_128(gpr, op.rt4), vt);
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return;
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}
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alignas(16) static thread_local u8 s_lut[256]
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{
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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@ -3136,41 +3286,52 @@ void spu_recompiler::SHUFB(spu_opcode_t op)
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return;
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}
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const XmmLink& v0 = XmmGet(op.rc, XmmType::Int); // v0 = mask
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const XmmLink& v1 = XmmAlloc();
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const XmmLink& v2 = XmmAlloc();
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const XmmLink& v3 = XmmAlloc();
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const XmmLink& v4 = XmmAlloc();
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const XmmLink& vFF = XmmAlloc();
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c->movdqa(v2, v0); // v2 = mask
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// generate specific values:
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c->movdqa(v1, XmmConst(_mm_set1_epi8(-0x20))); // v1 = 11100000
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c->movdqa(v3, XmmConst(_mm_set1_epi8(-0x80))); // v3 = 10000000
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c->pand(v2, v1); // filter mask v2 = mask & 11100000
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c->movdqa(vFF, v2); // and copy vFF = mask & 11100000
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c->movdqa(v4, XmmConst(_mm_set1_epi8(-0x40))); // v4 = 11000000
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c->pcmpeqb(vFF, v4); // gen 0xff vFF = (mask & 11100000 == 11000000) ? 0xff : 0
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c->movdqa(v4, v2); // copy again v4 = mask & 11100000
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c->pand(v4, v3); // filter mask v4 = mask & 10000000
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c->pcmpeqb(v2, v1); // v2 = (mask & 11100000 == 11100000) ? 0xff : 0
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c->pcmpeqb(v4, v3); // v4 = (mask & 10000000 == 10000000) ? 0xff : 0
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c->pand(v2, v3); // generate 0x80 v2 = (mask & 11100000 == 11100000) ? 0x80 : 0
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c->por(vFF, v2); // merge 0xff, 0x80 vFF = (mask & 11100000 == 11000000) ? 0xff : (mask & 11100000 == 11100000) ? 0x80 : 0
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c->pandn(v1, v0); // filter mask v1 = mask & 00011111
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// select bytes from [op.rb]:
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c->movdqa(v2, XmmConst(_mm_set1_epi8(0x0f))); // v2 = 00001111
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c->pxor(v1, XmmConst(_mm_set1_epi8(0x10))); // v1 = (mask & 00011111) ^ 00010000
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c->psubb(v2, v1); // v2 = 00001111 - ((mask & 00011111) ^ 00010000)
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c->movdqa(v1, SPU_OFF_128(gpr, op.rb)); // v1 = op.rb
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c->pshufb(v1, v2); // v1 = select(op.rb, 00001111 - ((mask & 00011111) ^ 00010000))
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// select bytes from [op.ra]:
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c->pxor(v2, XmmConst(_mm_set1_epi8(-0x10))); // v2 = (00001111 - ((mask & 00011111) ^ 00010000)) ^ 11110000
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c->movdqa(v3, SPU_OFF_128(gpr, op.ra)); // v3 = op.ra
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c->pshufb(v3, v2); // v3 = select(op.ra, (00001111 - ((mask & 00011111) ^ 00010000)) ^ 11110000)
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c->por(v1, v3); // v1 = select(op.rb, 00001111 - ((mask & 00011111) ^ 00010000)) | (v3)
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c->pandn(v4, v1); // filter result v4 = v1 & ((mask & 10000000 == 10000000) ? 0 : 0xff)
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c->por(vFF, v4); // final merge vFF = (mask & 10000000 == 10000000) ? ((mask & 11100000 == 11000000) ? 0xff : (mask & 11100000 == 11100000) ? 0x80 : 0) : (v1)
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c->movdqa(SPU_OFF_128(gpr, op.rt4), vFF);
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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const XmmLink& vb = XmmGet(op.rb, XmmType::Int);
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const XmmLink& vc = XmmGet(op.rc, XmmType::Int);
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const XmmLink& vt = XmmAlloc();
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const XmmLink& vm = XmmAlloc();
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const XmmLink& v5 = XmmAlloc();
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c->movdqa(vm, XmmConst(_mm_set1_epi8(0xc0)));
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// Test for (110xxxxx) and (11xxxxxx) bit values
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if (utils::has_avx())
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{
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c->vpand(v5, vc, XmmConst(_mm_set1_epi8(0xe0)));
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c->vpand(vt, vc, vm);
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}
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else
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||||
{
|
||||
c->movdqa(v5, vc);
|
||||
c->pand(v5, XmmConst(_mm_set1_epi8(0xe0)));
|
||||
c->movdqa(vt, vc);
|
||||
c->pand(vt, vm);
|
||||
}
|
||||
|
||||
c->pxor(vc, XmmConst(_mm_set1_epi8(0xf)));
|
||||
c->pshufb(va, vc);
|
||||
c->pshufb(vb, vc);
|
||||
c->pand(vc, XmmConst(_mm_set1_epi8(0x10)));
|
||||
c->pcmpeqb(v5, vm); // If true, result should become 0xFF
|
||||
c->pcmpeqb(vt, vm); // If true, result should become either 0xFF or 0x80
|
||||
c->pavgb(vt, v5); // Generate result constant: AVG(0xff, 0x00) == 0x80
|
||||
c->pxor(vm, vm);
|
||||
c->pcmpeqb(vc, vm);
|
||||
|
||||
// Select result value from va or vb
|
||||
if (utils::has_512())
|
||||
{
|
||||
c->vpternlogd(vc, va, vb, 0xca /* A?B:C */);
|
||||
}
|
||||
else
|
||||
{
|
||||
c->pand(va, vc);
|
||||
c->pandn(vc, vb);
|
||||
c->por(vc, va);
|
||||
}
|
||||
|
||||
c->por(vt, vc);
|
||||
c->movdqa(SPU_OFF_128(gpr, op.rt4), vt);
|
||||
}
|
||||
|
||||
void spu_recompiler::MPYA(spu_opcode_t op)
|
||||
|
||||
@ -258,4 +258,4 @@ struct spu_interpreter_precise final : spu_interpreter
|
||||
static void FNMS(SPUThread&, spu_opcode_t);
|
||||
static void FMA(SPUThread&, spu_opcode_t);
|
||||
static void FMS(SPUThread&, spu_opcode_t);
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user