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Possible workaround for mobile Kepler chips
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parent
935e398930
commit
6d91a9fe6f
@ -256,12 +256,20 @@ namespace vk
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void create_dma_block(std::unique_ptr<dma_block>& block, u32 base_address, usz expected_length)
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{
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const auto vendor = g_render_device->gpu().get_driver_vendor();
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const auto chip = g_render_device->gpu().get_chip_class();
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#ifdef _WIN32
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const bool allow_host_buffers = (vendor == driver_vendor::NVIDIA) ?
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//test_host_pointer(base_address, expected_length) :
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rsx::get_location(base_address) == CELL_GCM_LOCATION_LOCAL : // NVIDIA workaround
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true;
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bool allow_host_buffers;
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if (vendor == driver_vendor::NVIDIA)
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{
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allow_host_buffers = (chip != chip_class::NV_mobile_kepler) ?
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rsx::get_location(base_address) == CELL_GCM_LOCATION_LOCAL :
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false;
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}
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else
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{
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allow_host_buffers = true;
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}
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#else
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// Anything running on AMDGPU kernel driver will not work due to the check for fd-backed memory allocations
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const bool allow_host_buffers = (vendor != driver_vendor::AMD && vendor != driver_vendor::RADV);
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@ -33,10 +33,18 @@ namespace vk
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// NV cards. See https://envytools.readthedocs.io/en/latest/hw/pciid.html
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// NOTE: Since NV device IDs are linearly incremented per generation, there is no need to carefully check all the ranges
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table.add(0x1180, 0x11fa, chip_class::NV_kepler); // GK104, 106
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table.add(0x0FC0, 0x0FFF, chip_class::NV_kepler); // GK107
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table.add(0x1180, 0x1197, chip_class::NV_kepler); // GK104, 106
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table.add(0x1198, 0x11A9, chip_class::NV_mobile_kepler); // Mobile GK104
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table.add(0x11AA, 0x11DF, chip_class::NV_kepler); // GK104, 106
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table.add(0x11E0, 0x11E7, chip_class::NV_mobile_kepler); // Mobile GK106
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table.add(0x11E8, 0x11FA, chip_class::NV_kepler); // GK104, 106
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table.add(0x0FC0, 0x0FCC, chip_class::NV_kepler); // GK107
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table.add(0x0FCD, 0x0FEE, chip_class::NV_mobile_kepler); // Mobile GK107
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table.add(0x0FEF, 0x0FFF, chip_class::NV_kepler); // GK107
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table.add(0x1003, 0x1028, chip_class::NV_kepler); // GK110
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table.add(0x1280, 0x12BA, chip_class::NV_kepler); // GK208
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table.add(0x1280, 0x128F, chip_class::NV_kepler); // GK208
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table.add(0x1290, 0x129A, chip_class::NV_mobile_kepler); // Mobile GK208
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table.add(0x129B, 0x12BA, chip_class::NV_kepler); // GK208
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table.add(0x1381, 0x13B0, chip_class::NV_maxwell); // GM107
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table.add(0x1340, 0x134D, chip_class::NV_maxwell); // GM108
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table.add(0x13C0, 0x13D9, chip_class::NV_maxwell); // GM204
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@ -44,11 +52,11 @@ namespace vk
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table.add(0x15F7, 0x15F9, chip_class::NV_pascal); // GP100 (Tesla P100)
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table.add(0x1B00, 0x1D80, chip_class::NV_pascal);
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table.add(0x1D81, 0x1DBA, chip_class::NV_volta);
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table.add(0x1E02, 0x1F54, chip_class::NV_turing); // TU102, TU104, TU106, TU106M, TU106GL (RTX 20 series)
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table.add(0x1F82, 0x1FB9, chip_class::NV_turing); // TU117, TU117M, TU117GL
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table.add(0x2182, 0x21D1, chip_class::NV_turing); // TU116, TU116M, TU116GL
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table.add(0x20B0, 0x20BE, chip_class::NV_ampere); // GA100
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table.add(0x2204, 0x25AF, chip_class::NV_ampere); // GA10x (RTX 30 series)
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table.add(0x1E02, 0x1F54, chip_class::NV_turing); // TU102, TU104, TU106, TU106M, TU106GL (RTX 20 series)
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table.add(0x1F82, 0x1FB9, chip_class::NV_turing); // TU117, TU117M, TU117GL
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table.add(0x2182, 0x21D1, chip_class::NV_turing); // TU116, TU116M, TU116GL
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table.add(0x20B0, 0x20BE, chip_class::NV_ampere); // GA100
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table.add(0x2204, 0x25AF, chip_class::NV_ampere); // GA10x (RTX 30 series)
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return table;
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}();
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@ -16,6 +16,7 @@ namespace vk
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AMD_navi2x,
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NV_generic,
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NV_kepler,
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NV_mobile_kepler,
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NV_maxwell,
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NV_pascal,
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NV_volta,
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