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https://github.com/RPCS3/rpcs3.git
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rsx: Implement atomic FIFO fetching (stability improvement) (non-default setting) (#12107)
This commit is contained in:
Elad Ashkenazi
GitHub
parent
286f97fad0
commit
9bb7e8d614
@ -180,7 +180,7 @@ namespace cfg
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// Value node with fixed set of possible values, each maps to an enum value of type T.
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template <typename T>
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class _enum final : public _base
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class _enum : public _base
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{
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atomic_t<T> m_value;
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@ -6024,7 +6024,7 @@ public:
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break;
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}
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if (u64 cmdh = ci->getZExtValue() & ~(MFC_BARRIER_MASK | MFC_FENCE_MASK | MFC_RESULT_MASK); !g_use_rtm)
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if (u64 cmdh = ci->getZExtValue() & ~(MFC_BARRIER_MASK | MFC_FENCE_MASK | MFC_RESULT_MASK); g_cfg.core.rsx_fifo_accuracy || !g_use_rtm)
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{
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// TODO: don't require TSX (current implementation is TSX-only)
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if (cmdh == MFC_PUT_CMD || cmdh == MFC_SNDSIG_CMD)
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@ -1875,6 +1875,8 @@ void spu_thread::do_dma_transfer(spu_thread* _this, const spu_mfc_cmd& args, u8*
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src = zero_buf;
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}
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rsx::reservation_lock<false, 1> rsx_lock(eal, args.size, !is_get && g_cfg.core.rsx_fifo_accuracy && !g_cfg.core.spu_accurate_dma);
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if ((!g_use_rtm && !is_get) || g_cfg.core.spu_accurate_dma) [[unlikely]]
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{
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perf_meter<"ADMA_GET"_u64> perf_get = perf_;
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@ -432,6 +432,7 @@ error_code sys_rsx_context_attribute(u32 context_id, u32 package_id, u64 a3, u64
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const u64 get = static_cast<u32>(a3);
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const u64 put = static_cast<u32>(a4);
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vm::_ref<atomic_be_t<u64>>(render->dma_address + ::offset32(&RsxDmaControl::put)).release(put << 32 | get);
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render->fifo_ctrl->set_get(static_cast<u32>(get));
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render->last_known_code_start = get;
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render->sync_point_request.release(true);
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break;
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@ -4,10 +4,17 @@
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#include "RSXThread.h"
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#include "Capture/rsx_capture.h"
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#include "Common/time.hpp"
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#include "Emu/Memory/vm_reservation.h"
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#include "Emu/Cell/lv2/sys_rsx.h"
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#include "util/asm.hpp"
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#include <bitset>
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using spu_rdata_t = std::byte[128];
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extern void mov_rdata(spu_rdata_t& _dst, const spu_rdata_t& _src);
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extern bool cmp_rdata(const spu_rdata_t& _lhs, const spu_rdata_t& _rhs);
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namespace rsx
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{
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namespace FIFO
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@ -32,10 +39,11 @@ namespace rsx
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// NOTE: Only supposed to be invoked to wait for a single arg on command[0] (4 bytes)
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// Wait for put to allow us to procceed execution
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sync_get();
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invalidate_cache();
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while (read_put() == m_internal_get && !Emu.IsStopped())
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{
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std::this_thread::yield();
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get_current_renderer()->cpu_wait({});
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}
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}
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}
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@ -58,16 +66,120 @@ namespace rsx
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}
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}
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void FIFO_control::set_get(u32 get, bool check_spin)
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std::pair<bool, u32> FIFO_control::fetch_u32(u32 addr)
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{
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if (check_spin && m_ctrl->get == get)
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if (addr - m_cache_addr >= m_cache_size)
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{
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if (const u32 addr = m_iotable->get_addr(m_memwatch_addr); addr + 1)
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const u32 put = read_put();
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if (put == addr)
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{
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m_memwatch_addr = get;
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m_memwatch_cmp = vm::read32(addr);
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return {false, FIFO_EMPTY};
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}
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m_cache_addr = addr & -128;
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const u32 addr1 = m_iotable->get_addr(m_cache_addr);
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if (addr1 == umax)
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{
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m_cache_size = 0;
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return {false, FIFO_ERROR};
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}
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m_cache_size = std::min<u32>((put | 0x7f) - m_cache_addr, u32{sizeof(m_cache)} - 1) + 1;
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if (0x100000 - (m_cache_addr & 0xfffff) < m_cache_size)
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{
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// Check if memory layout changes in the next 1MB page boundary
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if ((addr1 >> 20) + 1 != (m_iotable->get_addr(m_cache_addr + 0x100000) >> 20))
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{
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// Trim cache as needed if memory layout changes
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m_cache_size = 0x100000 - (m_cache_addr & 0xfffff);
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}
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}
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// Make mask of cache lines to fetch
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u8 to_fetch = static_cast<u8>((1u << (m_cache_size / 128)) - 1);
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if (addr < put && put < m_cache_addr + m_cache_size)
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{
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// Adjust to knownly-prepared FIFO buffer bounds
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m_cache_size = put - m_cache_addr;
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}
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rsx::reservation_lock<true, 1> rsx_lock(addr1, m_cache_size, true);
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const auto src = vm::_ptr<spu_rdata_t>(addr1);
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// Find the next set bit after every iteration
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for (u32 i = 0, start_time = 0;; i = (std::countr_zero<u32>(utils::rol8(to_fetch, 0 - i - 1)) + i + 1) % 8)
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{
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// If a reservation is being updated, try to load another
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const auto& res = vm::reservation_acquire(addr1 + i * 128);
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const u64 time0 = res;
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if (!(time0 & 127))
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{
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mov_rdata(m_cache[i], src[i]);
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if (time0 == res && cmp_rdata(m_cache[i], src[i]))
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{
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// The fetch of the cache line content has been successful, unset its bit
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to_fetch &= ~(1u << i);
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if (!to_fetch)
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{
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break;
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}
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continue;
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}
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}
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if (!start_time)
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{
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start_time = rsx::uclock();
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}
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if (rsx::uclock() - start_time >= 50u)
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{
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const auto rsx = get_current_renderer();
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if (rsx->is_stopped())
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{
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return {};
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}
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rsx->cpu_wait({});
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// Add idle time in reverse: after exchnage start_time becomes uclock(), use substruction because of the reversed order of parameters
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const u64 _start = std::exchange(start_time, rsx::uclock());
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rsx->performance_counters.idle_time -= _start - start_time;
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}
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busy_wait(200);
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if (g_cfg.core.rsx_fifo_accuracy >= rsx_fifo_mode::atomic_ordered)
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{
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i = (i - 1) % 8;
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}
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}
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}
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be_t<u32> ret;
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std::memcpy(&ret, reinterpret_cast<const u8*>(&m_cache) + (addr - m_cache_addr), sizeof(u32));
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return {true, ret};
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}
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void FIFO_control::set_get(u32 get, u32 spin_cmd)
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{
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invalidate_cache();
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if (spin_cmd && m_ctrl->get == get)
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{
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m_memwatch_addr = get;
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m_memwatch_cmp = spin_cmd;
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return;
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}
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@ -76,21 +188,64 @@ namespace rsx
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m_remaining_commands = 0;
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}
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std::span<const u32> FIFO_control::get_current_arg_ptr() const
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{
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if (g_cfg.core.rsx_fifo_accuracy)
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{
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// Return a pointer to the cache storage with confined access
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return {reinterpret_cast<const u32*>(&m_cache) + (m_internal_get - m_cache_addr) / 4, (m_cache_size - (m_internal_get - m_cache_addr)) / 4};
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}
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else
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{
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// Return a raw pointer with no limited access
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return {static_cast<const u32*>(vm::base(m_iotable->get_addr(m_internal_get))), 0x10000};
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}
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}
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bool FIFO_control::read_unsafe(register_pair& data)
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{
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// Fast read with no processing, only safe inside a PACKET_BEGIN+count block
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if (m_remaining_commands &&
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m_internal_get != read_put<false>())
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if (m_remaining_commands)
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{
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m_command_reg += m_command_inc;
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m_args_ptr += 4;
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m_remaining_commands--;
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bool ok{};
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u32 arg = 0;
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if (g_cfg.core.rsx_fifo_accuracy)
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{
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std::tie(ok, arg) = fetch_u32(m_internal_get + 4);
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if (!ok)
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{
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if (arg == FIFO_ERROR)
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{
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get_current_renderer()->recover_fifo();
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}
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return false;
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}
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}
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else
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{
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if (m_internal_get + 4 == read_put<false>())
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{
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return false;
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}
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m_args_ptr += 4;
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arg = vm::read32(m_args_ptr);
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}
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m_internal_get += 4;
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data.set(m_command_reg, vm::read32(m_args_ptr));
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m_command_reg += m_command_inc;
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--m_remaining_commands;
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data.set(m_command_reg, arg);
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return true;
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}
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m_internal_get += 4;
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return false;
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}
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@ -101,10 +256,8 @@ namespace rsx
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if (m_remaining_commands > count)
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{
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m_command_reg += m_command_inc * count;
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m_args_ptr += 4 * count;
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m_remaining_commands -= count;
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m_internal_get += 4 * count;
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return true;
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}
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@ -120,19 +273,10 @@ namespace rsx
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void FIFO_control::read(register_pair& data)
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{
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const u32 put = read_put();
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m_internal_get = m_ctrl->get;
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if (put == m_internal_get)
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{
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// Nothing to do
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data.reg = FIFO_EMPTY;
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return;
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}
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if (m_remaining_commands && read_unsafe(data))
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if (m_remaining_commands)
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{
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// Previous block aborted to wait for PUT pointer
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read_unsafe(data);
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return;
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}
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@ -155,15 +299,38 @@ namespace rsx
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m_memwatch_cmp = 0;
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}
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if (const u32 addr = m_iotable->get_addr(m_internal_get); addr + 1)
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if (!g_cfg.core.rsx_fifo_accuracy)
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{
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m_cmd = vm::read32(addr);
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const u32 put = read_put();
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if (put == m_internal_get)
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{
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// Nothing to do
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data.reg = FIFO_EMPTY;
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return;
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}
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if (const u32 addr = m_iotable->get_addr(m_internal_get); addr + 1)
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{
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m_cmd = vm::read32(addr);
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}
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else
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{
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data.reg = FIFO_ERROR;
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return;
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}
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}
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else
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{
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// TODO: Optional recovery
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data.reg = FIFO_ERROR;
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return;
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if (auto [ok, arg] = fetch_u32(m_internal_get); ok)
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{
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m_cmd = arg;
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}
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else
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{
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data.reg = arg;
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return;
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}
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}
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if (m_cmd & RSX_METHOD_NON_METHOD_CMD_MASK) [[unlikely]]
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@ -188,20 +355,11 @@ namespace rsx
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if (!count)
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{
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m_ctrl->get.release(m_internal_get + 4);
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m_ctrl->get.release(m_internal_get += 4);
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data.reg = FIFO_NOP;
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return;
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}
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// Validate the args ptr if the command attempts to read from it
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m_args_ptr = m_iotable->get_addr(m_internal_get + 4);
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if (m_args_ptr == umax) [[unlikely]]
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{
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// Optional recovery
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data.reg = FIFO_ERROR;
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return;
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}
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if (count > 1)
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{
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// Set up readback parameters
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@ -210,8 +368,43 @@ namespace rsx
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m_remaining_commands = count - 1;
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}
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if (g_cfg.core.rsx_fifo_accuracy)
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{
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m_internal_get += 4;
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auto [ok, arg] = fetch_u32(m_internal_get);
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if (!ok)
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{
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// Optional recovery
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if (arg == FIFO_ERROR)
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{
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data.reg = FIFO_ERROR;
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}
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else
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{
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data.reg = FIFO_EMPTY;
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m_command_reg = m_cmd & 0xfffc;
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m_remaining_commands++;
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}
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return;
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}
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data.set(m_cmd & 0xfffc, arg);
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return;
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}
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inc_get(true); // Wait for data block to become available
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m_internal_get += 4;
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// Validate the args ptr if the command attempts to read from it
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m_args_ptr = m_iotable->get_addr(m_internal_get);
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if (m_args_ptr == umax) [[unlikely]]
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{
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// Optional recovery
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data.reg = FIFO_ERROR;
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return;
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}
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data.set(m_cmd & 0xfffc, vm::read32(m_args_ptr));
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}
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@ -452,7 +645,7 @@ namespace rsx
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}
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//rsx_log.warning("rsx jump(0x%x) #addr=0x%x, cmd=0x%x, get=0x%x, put=0x%x", offs, m_ioAddress + get, cmd, get, put);
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fifo_ctrl->set_get(offs);
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fifo_ctrl->set_get(offs, cmd);
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return;
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}
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if ((cmd & RSX_METHOD_CALL_CMD_MASK) == RSX_METHOD_CALL_CMD)
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@ -552,9 +745,9 @@ namespace rsx
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commands.back().rsx_command.first = (fifo_ctrl->last_cmd() & RSX_METHOD_NON_INCREMENT_CMD_MASK) | (reg << 2) | (remaining << 18);
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for (u32 i = 1; i < remaining && fifo_ctrl->get_pos() + (i - 1) * 4 != (ctrl->put & ~3); i++)
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for (u32 i = 1; i < remaining && fifo_ctrl->get_pos() + i * 4 != (ctrl->put & ~3); i++)
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{
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replay_cmd.rsx_command = std::make_pair(0, vm::read32(fifo_ctrl->get_current_arg_ptr() + (i * 4)));
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replay_cmd.rsx_command = std::make_pair(0, vm::read32(iomap_table.get_addr(fifo_ctrl->get_pos()) + (i * 4)));
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commands.push_back(replay_cmd);
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}
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@ -3,6 +3,8 @@
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#include "util/types.hpp"
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#include "Emu/RSX/gcm_enums.h"
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#include <span>
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struct RsxDmaControl;
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namespace rsx
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@ -124,18 +126,24 @@ namespace rsx
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u32 m_args_ptr = 0;
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u32 m_cmd = ~0u;
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u32 m_cache_addr = 0;
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u32 m_cache_size = 0;
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alignas(64) std::byte m_cache[8][128];
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public:
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FIFO_control(rsx::thread* pctrl);
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~FIFO_control() = default;
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std::pair<bool, u32> fetch_u32(u32 addr);
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void invalidate_cache() { m_cache_size = 0; }
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u32 get_pos() const { return m_internal_get; }
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u32 last_cmd() const { return m_cmd; }
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void sync_get() const;
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u32 get_current_arg_ptr() const { return m_args_ptr; }
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std::span<const u32> get_current_arg_ptr() const;
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u32 get_remaining_args_count() const { return m_remaining_commands; }
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void inc_get(bool wait);
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void set_get(u32 get, bool check_spin = false);
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void set_get(u32 get, u32 spin_cmd = 0);
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void abort();
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template <bool = true>
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@ -77,6 +77,12 @@ namespace rsx
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{
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std::function<bool(u32 addr, bool is_writing)> g_access_violation_handler;
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rsx_iomap_table::rsx_iomap_table() noexcept
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: ea(fill_array(-1))
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, io(fill_array(-1))
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{
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}
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|
||||
u32 get_address(u32 offset, u32 location, u32 size_to_check, u32 line, u32 col, const char* file, const char* func)
|
||||
{
|
||||
const auto render = get_current_renderer();
|
||||
@ -2649,6 +2655,7 @@ namespace rsx
|
||||
{
|
||||
// Make sure GET value is exposed before sync points
|
||||
fifo_ctrl->sync_get();
|
||||
fifo_ctrl->invalidate_cache();
|
||||
}
|
||||
|
||||
std::pair<u32, u32> thread::try_get_pc_of_x_cmds_backwards(u32 count, u32 get) const
|
||||
@ -2710,6 +2717,8 @@ namespace rsx
|
||||
|
||||
void thread::recover_fifo(u32 line, u32 col, const char* file, const char* func)
|
||||
{
|
||||
bool kill_itself = g_cfg.core.rsx_fifo_accuracy == rsx_fifo_mode::as_ps3;
|
||||
|
||||
const u64 current_time = rsx::uclock();
|
||||
|
||||
if (recovered_fifo_cmds_history.size() == 20u)
|
||||
@ -2721,13 +2730,18 @@ namespace rsx
|
||||
if (current_time - cmd_info.timestamp < 2'000'000u - std::min<u32>(g_cfg.video.driver_wakeup_delay * 700, 1'400'000))
|
||||
{
|
||||
// Probably hopeless
|
||||
fmt::throw_exception("Dead FIFO commands queue state has been detected!\nTry increasing \"Driver Wake-Up Delay\" setting in Advanced settings. Called from %s", src_loc{line, col, file, func});
|
||||
kill_itself = true;
|
||||
}
|
||||
|
||||
// Erase the last command from history, keep the size of the queue the same
|
||||
recovered_fifo_cmds_history.pop();
|
||||
}
|
||||
|
||||
if (kill_itself)
|
||||
{
|
||||
fmt::throw_exception("Dead FIFO commands queue state has been detected!\nTry increasing \"Driver Wake-Up Delay\" setting in Advanced settings. Called from %s", src_loc{line, col, file, func});
|
||||
}
|
||||
|
||||
// Error. Should reset the queue
|
||||
fifo_ctrl->set_get(restore_point);
|
||||
fifo_ret_addr = saved_fifo_ret;
|
||||
|
||||
@ -44,13 +44,9 @@ namespace rsx
|
||||
{
|
||||
std::array<atomic_t<u32>, 4096> ea;
|
||||
std::array<atomic_t<u32>, 4096> io;
|
||||
std::array<shared_mutex, 4096> rs{};
|
||||
std::array<shared_mutex, 0x8'0000> rs;
|
||||
|
||||
rsx_iomap_table() noexcept
|
||||
: ea(fill_array(-1))
|
||||
, io(fill_array(-1))
|
||||
{
|
||||
}
|
||||
rsx_iomap_table() noexcept;
|
||||
|
||||
// Try to get the real address given a mapped address
|
||||
// Returns -1 on failure
|
||||
@ -59,39 +55,32 @@ namespace rsx
|
||||
return this->ea[offs >> 20] | (offs & 0xFFFFF);
|
||||
}
|
||||
|
||||
template<bool IsFullLock>
|
||||
template <bool IsFullLock, uint Stride>
|
||||
bool lock(u32 addr, u32 len, cpu_thread* self = nullptr) noexcept
|
||||
{
|
||||
if (len <= 1) return false;
|
||||
const u32 end = addr + len - 1;
|
||||
|
||||
for (u32 block = (addr >> 20); block <= (end >> 20); ++block)
|
||||
bool added_wait = false;
|
||||
|
||||
for (u32 block = addr / 8192; block <= (end / 8192); block += Stride)
|
||||
{
|
||||
auto& mutex_ = rs[block];
|
||||
|
||||
if constexpr (IsFullLock)
|
||||
if (IsFullLock ? !mutex_.try_lock() : !mutex_.try_lock_shared()) [[ unlikely ]]
|
||||
{
|
||||
if (self) [[ likely ]]
|
||||
if (self)
|
||||
{
|
||||
while (!mutex_.try_lock())
|
||||
{
|
||||
self->cpu_wait({});
|
||||
}
|
||||
added_wait |= !self->state.test_and_set(cpu_flag::wait);
|
||||
}
|
||||
|
||||
if (!self || self->id_type() != 0x55u)
|
||||
{
|
||||
IsFullLock ? mutex_.lock() : mutex_.lock_shared();
|
||||
}
|
||||
else
|
||||
{
|
||||
mutex_.lock();
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (!self) [[ likely ]]
|
||||
{
|
||||
mutex_.lock_shared();
|
||||
}
|
||||
else
|
||||
{
|
||||
while (!mutex_.try_lock_shared())
|
||||
while (IsFullLock ? !mutex_.try_lock() : !mutex_.try_lock_shared())
|
||||
{
|
||||
self->cpu_wait({});
|
||||
}
|
||||
@ -99,16 +88,21 @@ namespace rsx
|
||||
}
|
||||
}
|
||||
|
||||
if (added_wait)
|
||||
{
|
||||
self->check_state();
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
template<bool IsFullLock>
|
||||
template <bool IsFullLock, uint Stride>
|
||||
void unlock(u32 addr, u32 len) noexcept
|
||||
{
|
||||
ensure(len >= 1);
|
||||
const u32 end = addr + len - 1;
|
||||
|
||||
for (u32 block = (addr >> 20); block <= (end >> 20); ++block)
|
||||
for (u32 block = (addr / 8192); block <= (end / 8192); block += Stride)
|
||||
{
|
||||
if constexpr (IsFullLock)
|
||||
{
|
||||
@ -847,7 +841,7 @@ namespace rsx
|
||||
return g_fxo->try_get<rsx::thread>();
|
||||
}
|
||||
|
||||
template<bool IsFullLock = false>
|
||||
template<bool IsFullLock = false, uint Stride = 128>
|
||||
class reservation_lock
|
||||
{
|
||||
u32 addr = 0, length = 0;
|
||||
@ -858,9 +852,7 @@ namespace rsx
|
||||
this->addr = addr;
|
||||
this->length = length;
|
||||
|
||||
auto renderer = get_current_renderer();
|
||||
cpu_thread* lock_owner = renderer->is_current_thread() ? renderer : nullptr;
|
||||
this->locked = renderer->iomap_table.lock<IsFullLock>(addr, length, lock_owner);
|
||||
this->locked = get_current_renderer()->iomap_table.lock<IsFullLock, Stride>(addr, length, get_current_cpu_thread());
|
||||
}
|
||||
|
||||
public:
|
||||
@ -873,6 +865,14 @@ namespace rsx
|
||||
}
|
||||
}
|
||||
|
||||
reservation_lock(u32 addr, u32 length, bool setting)
|
||||
{
|
||||
if (setting && addr < constants::local_mem_base)
|
||||
{
|
||||
lock_range(addr, length);
|
||||
}
|
||||
}
|
||||
|
||||
// Multi-range lock. If ranges overlap, the combined range will be acquired.
|
||||
// If ranges do not overlap, the first range that is in main memory will be acquired.
|
||||
reservation_lock(u32 dst_addr, u32 dst_length, u32 src_addr, u32 src_length)
|
||||
@ -904,7 +904,7 @@ namespace rsx
|
||||
{
|
||||
if (locked)
|
||||
{
|
||||
get_current_renderer()->iomap_table.unlock<IsFullLock>(addr, length);
|
||||
get_current_renderer()->iomap_table.unlock<IsFullLock, Stride>(addr, length);
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
@ -21,7 +21,11 @@ namespace rsx
|
||||
const u32 cmd = rsx->get_fifo_cmd();
|
||||
rsx_log.error("Invalid RSX method 0x%x (arg=0x%x, start=0x%x, count=0x%x, non-inc=%s)", reg << 2, arg,
|
||||
cmd & 0xfffc, (cmd >> 18) & 0x7ff, !!(cmd & RSX_METHOD_NON_INCREMENT_CMD));
|
||||
rsx->recover_fifo();
|
||||
|
||||
if (g_cfg.core.rsx_fifo_accuracy != rsx_fifo_mode::as_ps3)
|
||||
{
|
||||
rsx->recover_fifo();
|
||||
}
|
||||
}
|
||||
|
||||
static void trace_method(thread* /*rsx*/, u32 reg, u32 arg)
|
||||
@ -181,7 +185,9 @@ namespace rsx
|
||||
// TODO: Check if possible to write on reservations
|
||||
if (rsx->label_addr >> 28 != addr >> 28)
|
||||
{
|
||||
rsx_log.fatal("NV406E semaphore unexpected address. Please report to the developers. (offset=0x%x, addr=0x%x)", offset, addr);
|
||||
rsx_log.error("NV406E semaphore unexpected address. Please report to the developers. (offset=0x%x, addr=0x%x)", offset, addr);
|
||||
rsx->recover_fifo();
|
||||
return;
|
||||
}
|
||||
|
||||
write_gcm_label<false, true>(rsx, addr, arg);
|
||||
@ -260,13 +266,20 @@ namespace rsx
|
||||
return;
|
||||
}
|
||||
|
||||
const u32 addr = get_address(offset, method_registers.semaphore_context_dma_4097());
|
||||
|
||||
if (rsx->label_addr >> 28 != addr >> 28)
|
||||
{
|
||||
rsx_log.error("NV4097 semaphore unexpected address. Please report to the developers. (offset=0x%x, addr=0x%x)", offset, addr);
|
||||
}
|
||||
|
||||
if (g_cfg.video.strict_rendering_mode) [[ unlikely ]]
|
||||
{
|
||||
write_gcm_label<true, true>(rsx, get_address(offset, method_registers.semaphore_context_dma_4097()), arg);
|
||||
write_gcm_label<true, true>(rsx, addr, arg);
|
||||
}
|
||||
else
|
||||
{
|
||||
write_gcm_label<true, false>(rsx, get_address(offset, method_registers.semaphore_context_dma_4097()), arg);
|
||||
write_gcm_label<true, false>(rsx, addr, arg);
|
||||
}
|
||||
}
|
||||
|
||||
@ -283,8 +296,15 @@ namespace rsx
|
||||
return;
|
||||
}
|
||||
|
||||
const u32 addr = get_address(offset, method_registers.semaphore_context_dma_4097());
|
||||
|
||||
if (rsx->label_addr >> 28 != addr >> 28)
|
||||
{
|
||||
rsx_log.error("NV4097 semaphore unexpected address. Please report to the developers. (offset=0x%x, addr=0x%x)", offset, addr);
|
||||
}
|
||||
|
||||
const u32 val = (arg & 0xff00ff00) | ((arg & 0xff) << 16) | ((arg >> 16) & 0xff);
|
||||
write_gcm_label<true, true>(rsx, get_address(offset, method_registers.semaphore_context_dma_4097()), val);
|
||||
write_gcm_label<true, true>(rsx, addr, val);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -456,9 +476,16 @@ namespace rsx
|
||||
const u32 reg = index / 4;
|
||||
const u8 subreg = index % 4;
|
||||
|
||||
// Get real args count
|
||||
const u32 count = std::min<u32>({rsx->fifo_ctrl->get_remaining_args_count() + 1,
|
||||
static_cast<u32>(((rsx->ctrl->put & ~3ull) - (rsx->fifo_ctrl->get_pos() - 4)) / 4), 32 - index});
|
||||
// FIFO args count including this one
|
||||
const u32 fifo_args_cnt = rsx->fifo_ctrl->get_remaining_args_count() + 1;
|
||||
|
||||
// The range of methods this function resposible to
|
||||
const u32 method_range = 32 - index;
|
||||
|
||||
// Get limit imposed by FIFO PUT (if put is behind get it will result in a number ignored by min)
|
||||
const u32 fifo_read_limit = static_cast<u32>(((rsx->ctrl->put & ~3ull) - (rsx->fifo_ctrl->get_pos())) / 4);
|
||||
|
||||
const u32 count = std::min<u32>({fifo_args_cnt, fifo_read_limit, method_range});
|
||||
|
||||
const u32 load = rsx::method_registers.transform_constant_load();
|
||||
|
||||
@ -476,21 +503,28 @@ namespace rsx
|
||||
|
||||
const auto values = &rsx::method_registers.transform_constants[load + reg][subreg];
|
||||
|
||||
const auto fifo_span = rsx->fifo_ctrl->get_current_arg_ptr();
|
||||
|
||||
if (fifo_span.size() < rcount)
|
||||
{
|
||||
rcount = fifo_span.size();
|
||||
}
|
||||
|
||||
if (rsx->m_graphics_state & rsx::pipeline_state::transform_constants_dirty)
|
||||
{
|
||||
// Minor optimization: don't compare values if we already know we need invalidation
|
||||
copy_data_swap_u32(values, static_cast<u32*>(vm::base(rsx->fifo_ctrl->get_current_arg_ptr())), rcount);
|
||||
copy_data_swap_u32(values, fifo_span.data(), rcount);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (copy_data_swap_u32_cmp(values, static_cast<u32*>(vm::base(rsx->fifo_ctrl->get_current_arg_ptr())), rcount))
|
||||
if (copy_data_swap_u32_cmp(values, fifo_span.data(), rcount))
|
||||
{
|
||||
// Transform constants invalidation is expensive (~8k bytes per update)
|
||||
rsx->m_graphics_state |= rsx::pipeline_state::transform_constants_dirty;
|
||||
}
|
||||
}
|
||||
|
||||
rsx->fifo_ctrl->skip_methods(count - 1);
|
||||
rsx->fifo_ctrl->skip_methods(rcount - 1);
|
||||
}
|
||||
};
|
||||
|
||||
@ -500,9 +534,16 @@ namespace rsx
|
||||
{
|
||||
const u32 index = reg - NV4097_SET_TRANSFORM_PROGRAM;
|
||||
|
||||
// Get real args count
|
||||
const u32 count = std::min<u32>({rsx->fifo_ctrl->get_remaining_args_count() + 1,
|
||||
static_cast<u32>(((rsx->ctrl->put & ~3ull) - (rsx->fifo_ctrl->get_pos() - 4)) / 4), 32 - index});
|
||||
// FIFO args count including this one
|
||||
const u32 fifo_args_cnt = rsx->fifo_ctrl->get_remaining_args_count() + 1;
|
||||
|
||||
// The range of methods this function resposible to
|
||||
const u32 method_range = 32 - index;
|
||||
|
||||
// Get limit imposed by FIFO PUT (if put is behind get it will result in a number ignored by min)
|
||||
const u32 fifo_read_limit = static_cast<u32>(((rsx->ctrl->put & ~3ull) - (rsx->fifo_ctrl->get_pos())) / 4);
|
||||
|
||||
const u32 count = std::min<u32>({fifo_args_cnt, fifo_read_limit, method_range});
|
||||
|
||||
const u32 load_pos = rsx::method_registers.transform_program_load();
|
||||
|
||||
@ -515,11 +556,18 @@ namespace rsx
|
||||
rcount -= max - (max_vertex_program_instructions * 4);
|
||||
}
|
||||
|
||||
copy_data_swap_u32(&rsx::method_registers.transform_program[load_pos * 4 + index % 4], static_cast<u32*>(vm::base(rsx->fifo_ctrl->get_current_arg_ptr())), rcount);
|
||||
const auto fifo_span = rsx->fifo_ctrl->get_current_arg_ptr();
|
||||
|
||||
if (fifo_span.size() < rcount)
|
||||
{
|
||||
rcount = fifo_span.size();
|
||||
}
|
||||
|
||||
copy_data_swap_u32(&rsx::method_registers.transform_program[load_pos * 4 + index % 4], fifo_span.data(), rcount);
|
||||
|
||||
rsx->m_graphics_state |= rsx::pipeline_state::vertex_program_ucode_dirty;
|
||||
rsx::method_registers.transform_program_load_set(load_pos + ((rcount + index % 4) / 4));
|
||||
rsx->fifo_ctrl->skip_methods(count - 1);
|
||||
rsx->fifo_ctrl->skip_methods(rcount - 1);
|
||||
}
|
||||
};
|
||||
|
||||
@ -953,11 +1001,18 @@ namespace rsx
|
||||
}
|
||||
|
||||
// Get position of the current command arg
|
||||
const u32 src_offset = rsx->fifo_ctrl->get_pos() - 4;
|
||||
const u32 src_offset = rsx->fifo_ctrl->get_pos();
|
||||
|
||||
// Get real args count (starting from NV3089_COLOR)
|
||||
const u32 count = std::min<u32>({rsx->fifo_ctrl->get_remaining_args_count() + 1,
|
||||
static_cast<u32>(((rsx->ctrl->put & ~3ull) - src_offset) / 4), 0x700 - index, out_x_max - index});
|
||||
// FIFO args count including this one
|
||||
const u32 fifo_args_cnt = rsx->fifo_ctrl->get_remaining_args_count() + 1;
|
||||
|
||||
// The range of methods this function resposible to
|
||||
const u32 method_range = std::min<u32>(0x700 - index, out_x_max - index);
|
||||
|
||||
// Get limit imposed by FIFO PUT (if put is behind get it will result in a number ignored by min)
|
||||
const u32 fifo_read_limit = static_cast<u32>(((rsx->ctrl->put & ~3ull) - (rsx->fifo_ctrl->get_pos())) / 4);
|
||||
|
||||
u32 count = std::min<u32>({fifo_args_cnt, fifo_read_limit, method_range});
|
||||
|
||||
const u32 dst_dma = method_registers.blit_engine_output_location_nv3062();
|
||||
const u32 dst_offset = method_registers.blit_engine_output_offset_nv3062();
|
||||
@ -966,6 +1021,13 @@ namespace rsx
|
||||
const u32 x = method_registers.nv308a_x() + index;
|
||||
const u32 y = method_registers.nv308a_y();
|
||||
|
||||
const auto fifo_span = rsx->fifo_ctrl->get_current_arg_ptr();
|
||||
|
||||
if (fifo_span.size() < count)
|
||||
{
|
||||
count = fifo_span.size();
|
||||
}
|
||||
|
||||
// Skip "handled methods"
|
||||
rsx->fifo_ctrl->skip_methods(count - 1);
|
||||
|
||||
@ -986,12 +1048,10 @@ namespace rsx
|
||||
return;
|
||||
}
|
||||
|
||||
const auto src_address = get_address(src_offset, CELL_GCM_LOCATION_MAIN);
|
||||
|
||||
const auto dst = vm::_ptr<u8>(dst_address);
|
||||
const auto src = vm::_ptr<const u8>(src_address);
|
||||
const auto src = reinterpret_cast<const u8*>(fifo_span.data());
|
||||
|
||||
auto res = rsx::reservation_lock<true>(dst_address, data_length, src_address, data_length);
|
||||
rsx::reservation_lock<true> rsx_lock(dst_address, data_length);
|
||||
|
||||
if (rsx->fifo_ctrl->last_cmd() & RSX_METHOD_NON_INCREMENT_CMD_MASK) [[unlikely]]
|
||||
{
|
||||
@ -1022,9 +1082,8 @@ namespace rsx
|
||||
const auto data_length = count * 2;
|
||||
|
||||
const auto dst_address = get_address(dst_offset + (x * 2) + (y * out_pitch), dst_dma, data_length);
|
||||
const auto src_address = get_address(src_offset, CELL_GCM_LOCATION_MAIN);
|
||||
const auto dst = vm::_ptr<u16>(dst_address);
|
||||
const auto src = vm::_ptr<const u32>(src_address);
|
||||
const auto src = reinterpret_cast<const be_t<u32>*>(fifo_span.data());
|
||||
|
||||
if (!dst_address)
|
||||
{
|
||||
@ -1032,7 +1091,7 @@ namespace rsx
|
||||
return;
|
||||
}
|
||||
|
||||
auto res = rsx::reservation_lock<true>(dst_address, data_length, src_address, data_length);
|
||||
rsx::reservation_lock<true> rsx_lock(dst_address, data_length);
|
||||
|
||||
auto convert = [](u32 input) -> u16
|
||||
{
|
||||
|
||||
@ -43,6 +43,19 @@ struct cfg_root : cfg::node
|
||||
cfg::_bool spu_accurate_dma{ this, "Accurate SPU DMA", false };
|
||||
cfg::_bool accurate_cache_line_stores{ this, "Accurate Cache Line Stores", false };
|
||||
cfg::_bool rsx_accurate_res_access{this, "Accurate RSX reservation access", false, true};
|
||||
|
||||
struct fifo_setting : public cfg::_enum<rsx_fifo_mode>
|
||||
{
|
||||
using _enum = cfg::_enum<rsx_fifo_mode>;
|
||||
using _enum::_enum;
|
||||
|
||||
explicit operator bool() const
|
||||
{
|
||||
return get() != rsx_fifo_mode::fast;
|
||||
}
|
||||
};
|
||||
|
||||
fifo_setting rsx_fifo_accuracy{this, "RSX FIFO Accuracy", rsx_fifo_mode::fast };
|
||||
cfg::_bool spu_verification{ this, "SPU Verification", true }; // Should be enabled
|
||||
cfg::_bool spu_cache{ this, "SPU Cache", true };
|
||||
cfg::_bool spu_prof{ this, "SPU Profiler", false };
|
||||
|
||||
@ -187,6 +187,23 @@ void fmt_class_string<tsx_usage>::format(std::string& out, u64 arg)
|
||||
});
|
||||
}
|
||||
|
||||
template <>
|
||||
void fmt_class_string<rsx_fifo_mode>::format(std::string& out, u64 arg)
|
||||
{
|
||||
format_enum(out, arg, [](rsx_fifo_mode value)
|
||||
{
|
||||
switch (value)
|
||||
{
|
||||
case rsx_fifo_mode::fast: return "Fast";
|
||||
case rsx_fifo_mode::atomic: return "Atomic";
|
||||
case rsx_fifo_mode::atomic_ordered: return "Ordered & Atomic";
|
||||
case rsx_fifo_mode::as_ps3: return "PS3";
|
||||
}
|
||||
|
||||
return unknown;
|
||||
});
|
||||
}
|
||||
|
||||
template <>
|
||||
void fmt_class_string<sleep_timers_accuracy_level>::format(std::string& out, u64 arg)
|
||||
{
|
||||
|
||||
@ -218,6 +218,14 @@ enum class screen_quadrant
|
||||
bottom_right
|
||||
};
|
||||
|
||||
enum class rsx_fifo_mode
|
||||
{
|
||||
fast,
|
||||
atomic,
|
||||
atomic_ordered,
|
||||
as_ps3,
|
||||
};
|
||||
|
||||
enum class tsx_usage
|
||||
{
|
||||
disabled,
|
||||
|
||||
@ -1097,6 +1097,15 @@ QString emu_settings::GetLocalizedSetting(const QString& original, emu_settings_
|
||||
case sleep_timers_accuracy_level::_all_timers: return tr("All Timers", "Sleep timers accuracy");
|
||||
}
|
||||
break;
|
||||
case emu_settings_type::FIFOAccuracy:
|
||||
switch (static_cast<rsx_fifo_mode>(index))
|
||||
{
|
||||
case rsx_fifo_mode::fast: return tr("Fast", "RSX FIFO Accuracy");
|
||||
case rsx_fifo_mode::atomic: return tr("Atomic", "RSX FIFO Accuracy");
|
||||
case rsx_fifo_mode::atomic_ordered: return tr("Ordered & Atomic", "RSX FIFO Accuracy");
|
||||
case rsx_fifo_mode::as_ps3: return tr("PS3", "RSX FIFO Accuracy");
|
||||
}
|
||||
break;
|
||||
case emu_settings_type::PerfOverlayDetailLevel:
|
||||
switch (static_cast<detail_level>(index))
|
||||
{
|
||||
|
||||
@ -24,6 +24,7 @@ enum class emu_settings_type
|
||||
AccurateSpuDMA,
|
||||
AccurateClineStores,
|
||||
AccurateRSXAccess,
|
||||
FIFOAccuracy,
|
||||
AccurateXFloat,
|
||||
ApproximateXFloat,
|
||||
AccuratePPU128Loop,
|
||||
@ -194,6 +195,7 @@ inline static const QMap<emu_settings_type, cfg_location> settings_location =
|
||||
{ emu_settings_type::AccurateSpuDMA, { "Core", "Accurate SPU DMA"}},
|
||||
{ emu_settings_type::AccurateClineStores, { "Core", "Accurate Cache Line Stores"}},
|
||||
{ emu_settings_type::AccurateRSXAccess, { "Core", "Accurate RSX reservation access"}},
|
||||
{ emu_settings_type::FIFOAccuracy, { "Core", "RSX FIFO Accuracy"}},
|
||||
{ emu_settings_type::AccurateXFloat, { "Core", "Accurate xfloat"}},
|
||||
{ emu_settings_type::ApproximateXFloat, { "Core", "Approximate xfloat"}},
|
||||
{ emu_settings_type::MFCCommandsShuffling, { "Core", "MFC Commands Shuffling Limit"}},
|
||||
|
||||
@ -1341,6 +1341,12 @@ settings_dialog::settings_dialog(std::shared_ptr<gui_settings> gui_settings, std
|
||||
m_emu_settings->EnhanceComboBox(ui->sleepTimersAccuracy, emu_settings_type::SleepTimersAccuracy);
|
||||
SubscribeTooltip(ui->gb_sleep_timers_accuracy, tooltips.settings.sleep_timers_accuracy);
|
||||
|
||||
m_emu_settings->EnhanceComboBox(ui->FIFOAccuracy, emu_settings_type::FIFOAccuracy);
|
||||
SubscribeTooltip(ui->gb_rsx_fifo_accuracy, tooltips.settings.rsx_fifo_accuracy);
|
||||
|
||||
// Hide a developers' setting
|
||||
ui->FIFOAccuracy->removeItem(static_cast<int>(rsx_fifo_mode::as_ps3));
|
||||
|
||||
m_emu_settings->EnhanceComboBox(ui->vulkansched, emu_settings_type::VulkanAsyncSchedulerDriver);
|
||||
SubscribeTooltip(ui->gb_vulkansched, tooltips.settings.vulkan_async_scheduler);
|
||||
|
||||
|
||||
@ -2284,6 +2284,49 @@
|
||||
</layout>
|
||||
</widget>
|
||||
</item>
|
||||
<item>
|
||||
<widget class="QGroupBox" name="gb_clockScale">
|
||||
<property name="sizePolicy">
|
||||
<sizepolicy hsizetype="Preferred" vsizetype="Minimum">
|
||||
<horstretch>0</horstretch>
|
||||
<verstretch>0</verstretch>
|
||||
</sizepolicy>
|
||||
</property>
|
||||
<property name="title">
|
||||
<string>Clocks Scale</string>
|
||||
</property>
|
||||
<layout class="QVBoxLayout" name="gb_clockScale_layout">
|
||||
<item>
|
||||
<widget class="QSlider" name="clockScale">
|
||||
<property name="orientation">
|
||||
<enum>Qt::Horizontal</enum>
|
||||
</property>
|
||||
</widget>
|
||||
</item>
|
||||
<item>
|
||||
<layout class="QHBoxLayout" name="clockScaleLayout" stretch="1,0">
|
||||
<item>
|
||||
<widget class="QLabel" name="clockScaleText">
|
||||
<property name="text">
|
||||
<string>100%</string>
|
||||
</property>
|
||||
<property name="alignment">
|
||||
<set>Qt::AlignCenter</set>
|
||||
</property>
|
||||
</widget>
|
||||
</item>
|
||||
<item>
|
||||
<widget class="QPushButton" name="clockScaleReset">
|
||||
<property name="text">
|
||||
<string>Reset</string>
|
||||
</property>
|
||||
</widget>
|
||||
</item>
|
||||
</layout>
|
||||
</item>
|
||||
</layout>
|
||||
</widget>
|
||||
</item>
|
||||
<item>
|
||||
<spacer name="advancedTabSpacerLeft">
|
||||
<property name="orientation">
|
||||
@ -2459,6 +2502,24 @@
|
||||
</layout>
|
||||
</widget>
|
||||
</item>
|
||||
<item>
|
||||
<widget class="QGroupBox" name="gb_rsx_fifo_accuracy">
|
||||
<property name="sizePolicy">
|
||||
<sizepolicy hsizetype="Preferred" vsizetype="Minimum">
|
||||
<horstretch>0</horstretch>
|
||||
<verstretch>0</verstretch>
|
||||
</sizepolicy>
|
||||
</property>
|
||||
<property name="title">
|
||||
<string>RSX FIFO Accuracy</string>
|
||||
</property>
|
||||
<layout class="QVBoxLayout" name="gb_rsx_fifo_accuracy_layout">
|
||||
<item>
|
||||
<widget class="QComboBox" name="FIFOAccuracy"/>
|
||||
</item>
|
||||
</layout>
|
||||
</widget>
|
||||
</item>
|
||||
<item>
|
||||
<widget class="QGroupBox" name="gb_wakeupDelay">
|
||||
<property name="sizePolicy">
|
||||
@ -2552,49 +2613,6 @@
|
||||
</layout>
|
||||
</widget>
|
||||
</item>
|
||||
<item>
|
||||
<widget class="QGroupBox" name="gb_clockScale">
|
||||
<property name="sizePolicy">
|
||||
<sizepolicy hsizetype="Preferred" vsizetype="Minimum">
|
||||
<horstretch>0</horstretch>
|
||||
<verstretch>0</verstretch>
|
||||
</sizepolicy>
|
||||
</property>
|
||||
<property name="title">
|
||||
<string>Clocks Scale</string>
|
||||
</property>
|
||||
<layout class="QVBoxLayout" name="gb_clockScale_layout">
|
||||
<item>
|
||||
<widget class="QSlider" name="clockScale">
|
||||
<property name="orientation">
|
||||
<enum>Qt::Horizontal</enum>
|
||||
</property>
|
||||
</widget>
|
||||
</item>
|
||||
<item>
|
||||
<layout class="QHBoxLayout" name="clockScaleLayout" stretch="1,0">
|
||||
<item>
|
||||
<widget class="QLabel" name="clockScaleText">
|
||||
<property name="text">
|
||||
<string>100%</string>
|
||||
</property>
|
||||
<property name="alignment">
|
||||
<set>Qt::AlignCenter</set>
|
||||
</property>
|
||||
</widget>
|
||||
</item>
|
||||
<item>
|
||||
<widget class="QPushButton" name="clockScaleReset">
|
||||
<property name="text">
|
||||
<string>Reset</string>
|
||||
</property>
|
||||
</widget>
|
||||
</item>
|
||||
</layout>
|
||||
</item>
|
||||
</layout>
|
||||
</widget>
|
||||
</item>
|
||||
<item>
|
||||
<spacer name="advancedTabSpacerRight">
|
||||
<property name="orientation">
|
||||
|
||||
@ -33,6 +33,7 @@ public:
|
||||
const QString zcull_operation_mode = tr("Changes ZCULL report synchronization behaviour. Experiment to find the best option for your game. Approximate mode is recommended for most games.\n· Precise is the most accurate to PS3 behaviour. Required for accurate visuals in some titles such as Demon's Souls and The Darkness.\n· Approximate is a much faster way to generate occlusion data which may not always match what the PS3 would generate. Works well with most PS3 games.\n· Relaxed changes the synchronization method completely and can greatly improve performance in some games or completely break others.");
|
||||
const QString max_spurs_threads = tr("Limits the maximum number of SPURS threads in each thread group.\nMay improve performance in some cases, especially on systems with limited number of hardware threads.\nLimiting the number of threads is likely to cause crashes; it's recommended to keep this at the default value.");
|
||||
const QString sleep_timers_accuracy = tr("Changes the sleep period accuracy.\n'As Host' uses default accuracy of the underlying operating system, while 'All Timers' attempts to improve it.\n'Usleep Only' limits the adjustments to usleep syscall only.\nCan affect performance in unexpected ways.");
|
||||
const QString rsx_fifo_accuracy = tr("\"Fast\" is the least accurate setting, RSX does not emulate atomic FIFO buffer.\n\"Atomic & Ordered\" is the most accurate but it is the slowest and without much stability benefit in games over \"Atomic\" which benefits stability greatly in many games with little performance penalty.");
|
||||
const QString vblank_rate = tr("Adjusts the frequency of vertical blanking signals that the emulator sends.\nAffects timing of events which rely on these signals.");
|
||||
const QString vblank_ntsc_fixup = tr("Multiplies the rate of VBLANK by 1000/1001 for values like 59.94Hz.\nKnown to fix the rhythm game Space Channel 5 Part 2");
|
||||
const QString clocks_scale = tr("Changes the scale of emulated system time.\nAffects software which uses system time to calculate things such as dynamic timesteps.");
|
||||
|
||||
Loading…
Reference in New Issue
Block a user