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Settings: Enable Full Width AVX-512 by default

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It is only known to cause performance hits in old Skylake-X AVX-512 CPUs 
as opposed to the other AVX-512 enabled CPUs, so it should be enabled as 
default
This commit is contained in:
Ani 2023-06-11 17:15:06 +01:00
parent d662a39a12
commit cce699a465
1 changed files with 1 additions and 1 deletions
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rpcs3/Emu/system_config.h
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@ -71,7 +71,7 @@ struct cfg_root : cfg::node
cfg::_bool spu_relaxed_xfloat{ this, "Relaxed xfloat", true }; // Approximate accuracy for only the "FCGT", "FNMS", "FREST" AND "FRSQEST" instructions
cfg::_int<-1, 14> ppu_128_reservations_loop_max_length{ this, "Accurate PPU 128-byte Reservation Op Max Length", 0, true }; // -1: Always accurate, 0: Never accurate, 1-14: max accurate loop length
cfg::_int<-64, 64> stub_ppu_traps{ this, "Stub PPU Traps", 0, true }; // Hack, skip PPU traps for rare cases where the trap is continueable (specify relative instructions to skip)
cfg::_bool full_width_avx512{ this, "Full Width AVX-512", false };
cfg::_bool full_width_avx512{ this, "Full Width AVX-512", true };
cfg::_bool ppu_llvm_nj_fixup{ this, "PPU LLVM Java Mode Handling", true }; // Partially respect current Java Mode for alti-vec ops by PPU LLVM
cfg::_bool use_accurate_dfma{ this, "Use Accurate DFMA", true }; // Enable accurate double-precision FMA for CPUs which do not support it natively
cfg::_bool ppu_set_sat_bit{ this, "PPU Set Saturation Bit", false }; // Accuracy. If unset, completely disable saturation flag handling.