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Merge pull request #927 from raven02/patch-5

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Formatting RSX thread
This commit is contained in:
Raul Tambre 2014-12-26 10:20:18 +02:00
commit d6989c1847
2 changed files with 188 additions and 177 deletions
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221
rpcs3/Emu/RSX/RSXThread.cpp
View File

@ -14,33 +14,41 @@
u32 methodRegisters[0xffff];
void RSXThread::nativeRescale(float width, float height)
void RSXThread::NativeRescale(float width, float height)
{
switch (Ini.GSResolution.GetValue())
{
case 1: // 1920x1080 window size
{
m_width_scale = 1920 / width * 2.0f;
m_height_scale = 1080 / height * 2.0f;
m_width = 1920;
m_height = 1080;
}
break;
case 2: // 1280x720 window size
{
m_width_scale = 1280 / width * 2.0f;
m_height_scale = 720 / height * 2.0f;
m_width = 1280;
m_height = 720;
}
break;
case 4: // 720x480 window size
{
m_width_scale = 720 / width * 2.0f;
m_height_scale = 480 / height * 2.0f;
m_width = 720;
m_height = 480;
}
break;
case 5: // 720x576 window size
{
m_width_scale = 720 / width * 2.0f;
m_height_scale = 576 / height * 2.0f;
m_width = 720;
m_height = 576;
}
break;
}
}
@ -181,66 +189,21 @@ u32 RSXThread::OutOfArgsCount(const uint x, const u32 cmd, const u32 count, cons
return 0;
}
#define case_4(a, m) \
case a + m: \
case a + m * 2: \
case a + m * 3: \
index = (cmd - a) / m; \
case a \
#define case_16(a, m) \
case a + m: \
case a + m * 2: \
case a + m * 3: \
case a + m * 4: \
case a + m * 5: \
case a + m * 6: \
case a + m * 7: \
case a + m * 8: \
case a + m * 9: \
case a + m * 10: \
case a + m * 11: \
case a + m * 12: \
case a + m * 13: \
case a + m * 14: \
case a + m * 15: \
index = (cmd - a) / m; \
case a \
#define case_32(a, m) \
case a + m: \
case a + m * 2: \
case a + m * 3: \
case a + m * 4: \
case a + m * 5: \
case a + m * 6: \
case a + m * 7: \
case a + m * 8: \
case a + m * 9: \
case a + m * 10: \
case a + m * 11: \
case a + m * 12: \
case a + m * 13: \
case a + m * 14: \
case a + m * 15: \
case a + m * 16: \
case a + m * 17: \
case a + m * 18: \
case a + m * 19: \
case a + m * 20: \
case a + m * 21: \
case a + m * 22: \
case a + m * 23: \
case a + m * 24: \
case a + m * 25: \
case a + m * 26: \
case a + m * 27: \
case a + m * 28: \
case a + m * 29: \
case a + m * 30: \
case a + m * 31: \
index = (cmd - a) / m; \
case a \
#define case_2(offset, step) \
case offset: \
case offset + step:
#define case_4(offset, step) \
case_2(offset, step) \
case_2(offset + 2*step, step)
#define case_8(offset, step) \
case_4(offset, step) \
case_4(offset + 4*step, step)
#define case_16(offset, step) \
case_8(offset, step) \
case_8(offset + 8*step, step)
#define case_32(offset, step) \
case_16(offset, step) \
case_16(offset + 16*step, step)
void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const u32 count)
{
@ -389,26 +352,26 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
break;
// Texture
case_16(NV4097_SET_TEXTURE_FORMAT, 0x20):
case_16(NV4097_SET_TEXTURE_OFFSET, 0x20):
case_16(NV4097_SET_TEXTURE_FILTER, 0x20):
case_16(NV4097_SET_TEXTURE_ADDRESS, 0x20):
case_16(NV4097_SET_TEXTURE_IMAGE_RECT, 32):
case_16(NV4097_SET_TEXTURE_BORDER_COLOR, 0x20):
case_16(NV4097_SET_TEXTURE_CONTROL0, 0x20):
case_16(NV4097_SET_TEXTURE_CONTROL1, 0x20):
case_16(NV4097_SET_TEXTURE_FORMAT, 0x20)
case_16(NV4097_SET_TEXTURE_OFFSET, 0x20)
case_16(NV4097_SET_TEXTURE_FILTER, 0x20)
case_16(NV4097_SET_TEXTURE_ADDRESS, 0x20)
case_16(NV4097_SET_TEXTURE_IMAGE_RECT, 32)
case_16(NV4097_SET_TEXTURE_BORDER_COLOR, 0x20)
case_16(NV4097_SET_TEXTURE_CONTROL0, 0x20)
case_16(NV4097_SET_TEXTURE_CONTROL1, 0x20)
{
// Done using methodRegisters in RSXTexture.cpp
}
break;
case_16(NV4097_SET_TEX_COORD_CONTROL, 4):
case_16(NV4097_SET_TEX_COORD_CONTROL, 4)
{
LOG_WARNING(RSX, "NV4097_SET_TEX_COORD_CONTROL");
}
break;
case_16(NV4097_SET_TEXTURE_CONTROL3, 4):
case_16(NV4097_SET_TEXTURE_CONTROL3, 4)
{
RSXTexture& tex = m_textures[index];
const u32 a0 = ARGS(0);
@ -419,19 +382,19 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
break;
// Vertex Texture
case_4(NV4097_SET_VERTEX_TEXTURE_FORMAT, 0x20) :
case_4(NV4097_SET_VERTEX_TEXTURE_OFFSET, 0x20) :
case_4(NV4097_SET_VERTEX_TEXTURE_FILTER, 0x20) :
case_4(NV4097_SET_VERTEX_TEXTURE_ADDRESS, 0x20) :
case_4(NV4097_SET_VERTEX_TEXTURE_IMAGE_RECT, 0x20) :
case_4(NV4097_SET_VERTEX_TEXTURE_BORDER_COLOR, 0x20) :
case_4(NV4097_SET_VERTEX_TEXTURE_CONTROL0, 0x20) :
case_4(NV4097_SET_VERTEX_TEXTURE_FORMAT, 0x20)
case_4(NV4097_SET_VERTEX_TEXTURE_OFFSET, 0x20)
case_4(NV4097_SET_VERTEX_TEXTURE_FILTER, 0x20)
case_4(NV4097_SET_VERTEX_TEXTURE_ADDRESS, 0x20)
case_4(NV4097_SET_VERTEX_TEXTURE_IMAGE_RECT, 0x20)
case_4(NV4097_SET_VERTEX_TEXTURE_BORDER_COLOR, 0x20)
case_4(NV4097_SET_VERTEX_TEXTURE_CONTROL0, 0x20)
{
// Done using methodRegisters in RSXTexture.cpp
}
break;
case_4(NV4097_SET_VERTEX_TEXTURE_CONTROL3, 0x20) :
case_4(NV4097_SET_VERTEX_TEXTURE_CONTROL3, 0x20)
{
RSXVertexTexture& tex = m_vertex_textures[index];
const u32 a0 = ARGS(0);
@ -442,7 +405,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
break;
// Vertex data
case_16(NV4097_SET_VERTEX_DATA4UB_M, 4):
case_16(NV4097_SET_VERTEX_DATA4UB_M, 4)
{
const u32 a0 = ARGS(0);
u8 v0 = a0;
@ -461,7 +424,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
}
break;
case_16(NV4097_SET_VERTEX_DATA2F_M, 8):
case_16(NV4097_SET_VERTEX_DATA2F_M, 8)
{
const u32 a0 = ARGS(0);
const u32 a1 = ARGS(1);
@ -481,7 +444,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
}
break;
case_16(NV4097_SET_VERTEX_DATA4F_M, 16):
case_16(NV4097_SET_VERTEX_DATA4F_M, 16)
{
const u32 a0 = ARGS(0);
const u32 a1 = ARGS(1);
@ -507,7 +470,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
}
break;
case_16(NV4097_SET_VERTEX_DATA_ARRAY_OFFSET, 4):
case_16(NV4097_SET_VERTEX_DATA_ARRAY_OFFSET, 4)
{
const u32 addr = GetAddress(ARGS(0) & 0x7fffffff, ARGS(0) >> 31);
CMD_LOG("num=%d, addr=0x%x", index, addr);
@ -518,7 +481,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
}
break;
case_16(NV4097_SET_VERTEX_DATA_ARRAY_FORMAT, 4):
case_16(NV4097_SET_VERTEX_DATA_ARRAY_FORMAT, 4)
{
const u32 a0 = ARGS(0);
u16 frequency = a0 >> 16;
@ -542,7 +505,9 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_VERTEX_ATTRIB_INPUT_MASK:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_VERTEX_ATTRIB_INPUT_MASK: 0x%x", ARGS(0));
}
//VertexData[0].prog.attributeInputMask = ARGS(0);
}
@ -551,7 +516,9 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_VERTEX_ATTRIB_OUTPUT_MASK:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_VERTEX_ATTRIB_OUTPUT_MASK: 0x%x", ARGS(0));
}
//VertexData[0].prog.attributeOutputMask = ARGS(0);
//FragmentData.prog.attributeInputMask = ARGS(0)/* & ~0x20*/;
@ -574,8 +541,10 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_COLOR_MASK_MRT:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_COLOR_MASK_MRT: 0x%x", ARGS(0));
}
}
break;
// Alpha testing
@ -678,8 +647,10 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_BLEND_COLOR2:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_BLEND_COLOR2: 0x % x", ARGS(0));
}
}
break;
case NV4097_SET_BLEND_EQUATION:
@ -693,8 +664,10 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_REDUCE_DST_COLOR:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_REDUCE_DST_COLOR: 0x%x", ARGS(0));
}
}
break;
// Depth bound testing
@ -913,15 +886,19 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_CLEAR_RECT_HORIZONTAL:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_CLEAR_RECT_HORIZONTAL: 0x%x", ARGS(0));
}
}
break;
case NV4097_SET_CLEAR_RECT_VERTICAL:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_CLEAR_RECT_VERTICAL: 0x%x", ARGS(0));
}
}
break;
// Arrays
@ -1031,8 +1008,10 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
u32 vertex_size = i.data.size() / (i.size * i.GetTypeSize());
if (min_vertex_size > vertex_size)
{
min_vertex_size = vertex_size;
}
}
m_draw_array_count = min_vertex_size;
m_draw_array_first = 0;
@ -1095,10 +1074,9 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
if (count == 2)
{
const u32 start = ARGS(1);
if (start)
if (ARGS(1))
{
LOG_WARNING(RSX, "NV4097_SET_TRANSFORM_PROGRAM_LOAD: start = %d", start);
LOG_WARNING(RSX, "NV4097_SET_TRANSFORM_PROGRAM_LOAD: start = %d", ARGS(0));
}
}
}
@ -1106,15 +1084,14 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_TRANSFORM_PROGRAM_START:
{
const u32 start = ARGS(0);
if (start)
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_TRANSFORM_PROGRAM_START: start = %d", start);
LOG_WARNING(RSX, "NV4097_SET_TRANSFORM_PROGRAM_START: start = %d", ARGS(0));
}
}
break;
case_32(NV4097_SET_TRANSFORM_PROGRAM, 4):
case_32(NV4097_SET_TRANSFORM_PROGRAM, 4)
{
//LOG_WARNING(RSX, "NV4097_SET_TRANSFORM_PROGRAM[%d](%d)", index, count);
@ -1129,7 +1106,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
break;
case NV4097_SET_TRANSFORM_TIMEOUT:
{
// TODO:
// (cmd)[1] = CELL_GCM_ENDIAN_SWAP((count) | ((registerCount) << 16)); \
@ -1140,6 +1117,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
}
//m_cur_vertex_prog->Decompile();
}
break;
case NV4097_SET_TRANSFORM_CONSTANT_LOAD:
@ -1169,8 +1147,10 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_INVALIDATE_L2:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_INVALIDATE_L2: 0x%x", ARGS(0));
}
}
break;
case NV4097_INVALIDATE_VERTEX_CACHE_FILE:
@ -1188,8 +1168,10 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_INVALIDATE_ZCULL:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_INVALIDATE_ZCULL: 0x%x", ARGS(0));
}
}
break;
// Logic Ops
@ -1352,7 +1334,9 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_SCULL_CONTROL:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_SCULL_CONTROL: 0x%x", ARGS(0));
}
//This is stencil culling , nothing to do with stencil masking on regular color or depth buffer
//const u32 a0 = ARGS(0);
@ -1390,8 +1374,10 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_POINT_PARAMS_ENABLE:
{
if (ARGS(0))
{
LOG_ERROR(RSX, "NV4097_SET_POINT_PARAMS_ENABLE: 0x%x", ARGS(0));
}
}
break;
case NV4097_SET_POINT_SPRITE_CONTROL:
@ -1460,7 +1446,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
m_height = buffers[m_gcm_current_buffer].height;
// Rescale native resolution to fit 1080p/720p/480p/576p window size
nativeRescale((float)m_width, (float)m_height);
NativeRescale((float)m_width, (float)m_height);
}
break;
@ -1600,15 +1586,19 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_CONTEXT_DMA_SEMAPHORE:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_CONTEXT_DMA_SEMAPHORE: 0x%x", ARGS(0));
}
}
break;
case NV4097_SET_CONTEXT_DMA_NOTIFIES:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_CONTEXT_DMA_NOTIFIES: 0x%x", ARGS(0));
}
}
break;
case NV4097_SET_SURFACE_CLIP_HORIZONTAL:
@ -1718,7 +1708,9 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_ZCULL_CONTROL0:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_ZCULL_CONTROL0: 0x%x", ARGS(0));
}
//m_set_depth_func = true;
//m_depth_func = ARGS(0) >> 4;
@ -1728,7 +1720,9 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_ZCULL_CONTROL1:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_ZCULL_CONTROL1: 0x%x", ARGS(0));
}
//m_set_depth_func = true;
//m_depth_func = ARGS(0) >> 4;
@ -1738,15 +1732,19 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_ZCULL_STATS_ENABLE:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_SET_ZCULL_STATS_ENABLE: 0x%x", ARGS(0));
}
}
break;
case NV4097_ZCULL_SYNC:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV4097_ZCULL_SYNC: 0x%x", ARGS(0));
}
}
break;
// Reports
@ -1840,8 +1838,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
const u8 cullNearFarEnable = ARGS(0) & 0xf;
const u8 zclampEnable = (ARGS(0) >> 4) & 0xf;
const u8 cullIgnoreW = (ARGS(0) >> 8) & 0xf;
LOG_WARNING(RSX, "TODO: NV4097_SET_ZMIN_MAX_CONTROL: cullNearFarEnable=%d, zclampEnable=%d, cullIgnoreW=%d",
cullNearFarEnable, zclampEnable, cullIgnoreW);
LOG_WARNING(RSX, "TODO: NV4097_SET_ZMIN_MAX_CONTROL: cullNearFarEnable=%d, zclampEnable=%d, cullIgnoreW=%d", cullNearFarEnable, zclampEnable, cullIgnoreW);
}
break;
@ -1920,6 +1917,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
if (!offset)
{
//
}
else
{
@ -1931,15 +1929,19 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV0039_PITCH_IN:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV0039_PITCH_IN: 0x%x", ARGS(0));
}
}
break;
case NV0039_BUFFER_NOTIFY:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV0039_BUFFER_NOTIFY: 0x%x", ARGS(0));
}
}
break;
// NV3062
@ -1967,8 +1969,10 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV309E_SET_CONTEXT_DMA_IMAGE:
{
if (ARGS(0))
{
LOG_WARNING(RSX, "NV309E_SET_CONTEXT_DMA_IMAGE: 0x%x", ARGS(0));
}
}
break;
case NV309E_SET_FORMAT:
@ -2307,7 +2311,9 @@ void RSXThread::Task()
if (put == get)
{
if (m_flip_status == 0)
{
m_sem_flip.post_and_wait();
}
m_sem_flush.post_and_wait();
}
@ -2316,49 +2322,51 @@ void RSXThread::Task()
continue;
}
//ConLog.Write("addr = 0x%x", m_ioAddress + get);
const u32 cmd = ReadIO32(get);
const u32 count = (cmd >> 18) & 0x7ff;
//if(cmd == 0) continue;
if (Ini.RSXLogging.GetValue())
{
LOG_NOTICE(Log::RSX, "%s (cmd=0x%x)", GetMethodName(cmd & 0xffff).c_str(), cmd);
//LOG_NOTICE(Log::RSX, "put=0x%x, get=0x%x, cmd=0x%x (%s)", put, get, cmd, GetMethodName(cmd & 0xffff).c_str());
}
if (cmd & CELL_GCM_METHOD_FLAG_JUMP)
{
u32 offs = cmd & 0x1fffffff;
//LOG_WARNING(RSX, "rsx jump(0x%x) #addr=0x%x, cmd=0x%x, get=0x%x, put=0x%x", offs, m_ioAddress + get, cmd, get, put);
//LOG_WARNING(RSX, "RSX: jump cmd (0x%x) #addr=0x%x, cmd=0x%x, get=0x%x, put=0x%x", offs, m_ioAddress + get, cmd, get, put);
m_ctrl->get.exchange(be_t<u32>::make(offs));
continue;
}
if (cmd & CELL_GCM_METHOD_FLAG_CALL)
{
m_call_stack.push(get + 4);
u32 offs = cmd & ~3;
//u32 addr = offs;
//LOG_WARNING(RSX, "rsx call(0x%x) #0x%x - 0x%x", offs, cmd, get);
//LOG_WARNING(RSX, "RSX: call cmd (0x%x) #0x%x - 0x%x", offs, cmd, get);
m_ctrl->get.exchange(be_t<u32>::make(offs));
continue;
}
if (cmd == CELL_GCM_METHOD_FLAG_RETURN)
{
//LOG_WARNING(RSX, "rsx return!");
u32 get = m_call_stack.top();
m_call_stack.pop();
//LOG_WARNING(RSX, "rsx return(0x%x)", get);
//LOG_WARNING(RSX, "RSX: return cmd (0x%x)", get);
m_ctrl->get.exchange(be_t<u32>::make(get));
continue;
}
if (cmd & CELL_GCM_METHOD_FLAG_NON_INCREMENT)
{
//LOG_WARNING(RSX, "non increment cmd! 0x%x", cmd);
//LOG_WARNING(RSX,"RSX: non-increment cmd! 0x%x", cmd);
inc = 0;
}
else
{
//LOG_WARNING(RSX, "increment cmd! 0x%x", cmd);
//LOG_WARNING(RSX, "RSX: increment cmd! 0x%x", cmd);
inc++;
}
if (cmd == 0) //nop
@ -2383,13 +2391,14 @@ void RSXThread::Task()
{
value += (count + 1) * 4;
});
//memset(Memory.GetMemFromAddr(p.m_ioAddress + get), 0, (count + 1) * 4);
}
catch (const std::string& e)
{
LOG_ERROR(RSX, "Exception: %s", e.c_str());
Emu.Pause();
}
catch (const char* e)
{
LOG_ERROR(RSX, "Exception: %s", e);

4
rpcs3/Emu/RSX/RSXThread.h
View File

@ -519,6 +519,8 @@ protected:
m_line_stipple_factor = 1;
m_vertex_data_base_offset = 0;
m_vertex_data_base_index = 0;
// Construct Stipple Pattern
for (size_t i = 0; i < 32; i++) {
m_polygon_stipple_pattern[i] = 0xFFFFFFFF;
}
@ -622,7 +624,7 @@ protected:
u32 OutOfArgsCount(const uint x, const u32 cmd, const u32 count, const u32 args_addr);
void DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const u32 count);
void nativeRescale(float width, float height);
void NativeRescale(float width, float height);
virtual void OnInit() = 0;
virtual void OnInitThread() = 0;