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rsx: Rework loop interrupts a bit

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- Reset backend interrupt in core handler
- Separate memory config interrupt from regular backend interrupt
This commit is contained in:
kd-11 2022-05-16 20:48:30 +03:00 committed by kd-11
parent d0dc095c84
commit e368453751
4 changed files with 10 additions and 6 deletions
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1
rpcs3/Emu/RSX/GL/GLGSRender.cpp
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@ -967,6 +967,7 @@ bool GLGSRender::on_access_violation(u32 address, bool is_writing)
{
auto &task = post_flush_request(address, result);
m_graphics_state |= ~rsx::pipeline_state::backend_interrupt;
vm::temporary_unlock();
task.producer_wait();
}

8
rpcs3/Emu/RSX/RSXThread.cpp
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@ -767,7 +767,7 @@ namespace rsx
// This avoids expensive calls to check timestamps which involves reading some values from TLS storage on windows.
// If something is going on in the backend that requires an update, set the interrupt bit explicitly.
if ((m_cycles_counter++ & 63) == 0 ||
m_graphics_state & (rsx::pipeline_state::backend_interrupt_bits))
m_graphics_state & rsx::pipeline_state::backend_interrupt_bits)
{
// Execute backend-local tasks first
do_local_task(performance_counters.state);
@ -1049,6 +1049,8 @@ namespace rsx
void thread::do_local_task(FIFO_state state)
{
m_graphics_state &= ~rsx::pipeline_state::backend_interrupt;
if (async_flip_requested & flip_request::emu_requested)
{
// NOTE: This has to be executed immediately
@ -2960,13 +2962,15 @@ namespace rsx
m_invalidated_memory_range = unmap_range;
}
m_graphics_state |= rsx::pipeline_state::backend_interrupt;
m_graphics_state |= rsx::pipeline_state::memory_config_interrupt;
}
}
// NOTE: m_mtx_task lock must be acquired before calling this method
void thread::handle_invalidated_memory_range()
{
m_graphics_state &= ~rsx::pipeline_state::memory_config_interrupt;
if (!m_invalidated_memory_range.valid())
return;

3
rpcs3/Emu/RSX/RSXThread.h
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@ -133,13 +133,14 @@ namespace rsx
push_buffer_arrays_dirty = 0x20000, // Push buffers have data written to them (immediate mode vertex buffers)
backend_interrupt = 0x80000000, // Backend interrupt, must serve immediately
memory_config_interrupt = 0x40000000, // Memory configuration changed
fragment_program_dirty = fragment_program_ucode_dirty | fragment_program_state_dirty,
vertex_program_dirty = vertex_program_ucode_dirty | vertex_program_state_dirty,
invalidate_pipeline_bits = fragment_program_dirty | vertex_program_dirty,
invalidate_zclip_bits = vertex_state_dirty | zclip_config_state_dirty,
memory_barrier_bits = framebuffer_reads_dirty,
backend_interrupt_bits = memory_barrier_bits | backend_interrupt,
backend_interrupt_bits = memory_barrier_bits | memory_config_interrupt | backend_interrupt,
all_dirty = ~0u
};

4
rpcs3/Emu/RSX/VK/VKGSRender.cpp
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@ -825,6 +825,7 @@ bool VKGSRender::on_access_violation(u32 address, bool is_writing)
std::lock_guard lock(m_flush_queue_mutex);
m_flush_requests.post(false);
m_graphics_state |= rsx::pipeline_state::backend_interrupt;
has_queue_ref = true;
}
else
@ -1645,9 +1646,6 @@ void VKGSRender::sync_hint(rsx::FIFO_hint hint, rsx::reports::sync_hint_payload_
void VKGSRender::do_local_task(rsx::FIFO_state state)
{
// Clear interrupt bit if set
m_graphics_state &= ~rsx::pipeline_state::backend_interrupt;
if (m_queue_status & flush_queue_state::deadlock)
{
// Clear offloader deadlock