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SPU: fixes

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This commit is contained in:
Nekotekina 2017-12-20 01:21:59 +03:00
parent 83da7f9b63
commit f24491de84
2 changed files with 20 additions and 20 deletions
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20
rpcs3/Emu/Cell/SPUASMJITRecompiler.cpp
View File

@ -622,7 +622,7 @@ void spu_recompiler::ROTM(spu_opcode_t op)
{
for (u32 i = 0; i < 4; i++)
{
t[i] = static_cast<u32>(static_cast<u64>(a[i]) >> (0 - b[i]));
t[i] = static_cast<u32>(static_cast<u64>(a[i]) >> ((0 - b[i]) & 0x3f));
}
};
@ -662,7 +662,7 @@ void spu_recompiler::ROTMA(spu_opcode_t op)
{
for (u32 i = 0; i < 4; i++)
{
t[i] = static_cast<s32>(static_cast<s64>(a[i]) >> (0 - b[i]));
t[i] = static_cast<s32>(static_cast<s64>(a[i]) >> ((0 - b[i]) & 0x3f));
}
};
@ -701,7 +701,7 @@ void spu_recompiler::SHL(spu_opcode_t op)
{
for (u32 i = 0; i < 4; i++)
{
t[i] = static_cast<u32>(static_cast<u64>(a[i]) << b[i]);
t[i] = static_cast<u32>(static_cast<u64>(a[i]) << (b[i] & 0x3f));
}
};
@ -746,7 +746,7 @@ void spu_recompiler::ROTH(spu_opcode_t op) //nf
return;
}
auto body = [](u16* t, const u16* a, const s16* b) noexcept
auto body = [](u16* t, const u16* a, const u16* b) noexcept
{
for (u32 i = 0; i < 8; i++)
{
@ -757,7 +757,7 @@ void spu_recompiler::ROTH(spu_opcode_t op) //nf
c->lea(*qw0, SPU_OFF_128(gpr, op.rt));
c->lea(*qw1, SPU_OFF_128(gpr, op.ra));
c->lea(*qw2, SPU_OFF_128(gpr, op.rb));
asmjit::CCFuncCall* call = c->call(asmjit::imm_ptr(asmjit::Internal::ptr_cast<void*, void(u16*, const u16*, const s16*)>(body)), asmjit::FuncSignature3<void, void*, void*, void*>(asmjit::CallConv::kIdHost));
asmjit::CCFuncCall* call = c->call(asmjit::imm_ptr(asmjit::Internal::ptr_cast<void*, void(u16*, const u16*, const u16*)>(body)), asmjit::FuncSignature3<void, void*, void*, void*>(asmjit::CallConv::kIdHost));
call->setArg(0, *qw0);
call->setArg(1, *qw1);
call->setArg(2, *qw2);
@ -789,7 +789,7 @@ void spu_recompiler::ROTHM(spu_opcode_t op)
{
for (u32 i = 0; i < 8; i++)
{
t[i] = static_cast<u16>(static_cast<u32>(a[i]) >> (0 - b[i]));
t[i] = static_cast<u16>(static_cast<u32>(a[i]) >> ((0 - b[i]) & 0x1f));
}
};
@ -829,7 +829,7 @@ void spu_recompiler::ROTMAH(spu_opcode_t op)
{
for (u32 i = 0; i < 8; i++)
{
t[i] = static_cast<s16>(static_cast<s32>(a[i]) >> (0 - b[i]));
t[i] = static_cast<s16>(static_cast<s32>(a[i]) >> ((0 - b[i]) & 0x1f));
}
};
@ -868,7 +868,7 @@ void spu_recompiler::SHLH(spu_opcode_t op)
{
for (u32 i = 0; i < 8; i++)
{
t[i] = static_cast<u16>(static_cast<u32>(a[i]) << b[i]);
t[i] = static_cast<u16>(static_cast<u32>(a[i]) << (b[i] & 0x1f));
}
};
@ -1356,7 +1356,7 @@ void spu_recompiler::ROTQMBYBI(spu_opcode_t op)
{
const auto a = *(__m128i*)_a;
alignas(64) const __m128i buf[3]{a, _mm_setzero_si128(), _mm_setzero_si128()};
*(__m128i*)t = _mm_loadu_si128((__m128i*)((u8*)buf + (v >> 3 & 0x1f)));
*(__m128i*)t = _mm_loadu_si128((__m128i*)((u8*)buf + ((0 - (v >> 3)) & 0x1f)));
};
if (!utils::has_ssse3())
@ -1556,7 +1556,7 @@ void spu_recompiler::ROTQMBY(spu_opcode_t op)
{
const auto a = *(__m128i*)_a;
alignas(64) const __m128i buf[3]{a, _mm_setzero_si128(), _mm_setzero_si128()};
*(__m128i*)t = _mm_loadu_si128((__m128i*)((u8*)buf + (v & 0x1f)));
*(__m128i*)t = _mm_loadu_si128((__m128i*)((u8*)buf + ((0 - v) & 0x1f)));
};
if (!utils::has_ssse3())

20
rpcs3/Emu/Cell/SPUInterpreter.cpp
View File

@ -161,7 +161,7 @@ void spu_interpreter::ROTM(SPUThread& spu, spu_opcode_t op)
for (u32 i = 0; i < 4; i++)
{
const u64 value = a._u32[i];
spu.gpr[op.rt]._u32[i] = static_cast<u32>(value >> (0 - b._u32[i]));
spu.gpr[op.rt]._u32[i] = static_cast<u32>(value >> ((0 - b._u32[i]) & 0x3f));
}
}
@ -173,7 +173,7 @@ void spu_interpreter::ROTMA(SPUThread& spu, spu_opcode_t op)
for (u32 i = 0; i < 4; i++)
{
const s64 value = a._s32[i];
spu.gpr[op.rt]._s32[i] = static_cast<s32>(value >> (0 - b._u32[i]));
spu.gpr[op.rt]._s32[i] = static_cast<s32>(value >> ((0 - b._u32[i]) & 0x3f));
}
}
@ -185,7 +185,7 @@ void spu_interpreter::SHL(SPUThread& spu, spu_opcode_t op)
for (u32 i = 0; i < 4; i++)
{
const u64 value = a._u32[i];
spu.gpr[op.rt]._u32[i] = static_cast<u32>(value << b._u32[i]);
spu.gpr[op.rt]._u32[i] = static_cast<u32>(value << (b._u32[i] & 0x3f));
}
}
@ -196,7 +196,7 @@ void spu_interpreter::ROTH(SPUThread& spu, spu_opcode_t op)
for (u32 i = 0; i < 8; i++)
{
spu.gpr[op.rt]._u16[i] = rol16(a._u16[i], b._s16[i]);
spu.gpr[op.rt]._u16[i] = rol16(a._u16[i], b._u16[i]);
}
}
@ -208,7 +208,7 @@ void spu_interpreter::ROTHM(SPUThread& spu, spu_opcode_t op)
for (u32 i = 0; i < 8; i++)
{
const u32 value = a._u16[i];
spu.gpr[op.rt]._u16[i] = static_cast<u16>(value >> (0 - b._u16[i]));
spu.gpr[op.rt]._u16[i] = static_cast<u16>(value >> ((0 - b._u16[i]) & 0x1f));
}
}
@ -220,7 +220,7 @@ void spu_interpreter::ROTMAH(SPUThread& spu, spu_opcode_t op)
for (u32 i = 0; i < 8; i++)
{
const s32 value = a._s16[i];
spu.gpr[op.rt]._s16[i] = static_cast<s16>(value >> (0 - b._u16[i]));
spu.gpr[op.rt]._s16[i] = static_cast<s16>(value >> ((0 - b._u16[i]) & 0x1f));
}
}
@ -232,7 +232,7 @@ void spu_interpreter::SHLH(SPUThread& spu, spu_opcode_t op)
for (u32 i = 0; i < 8; i++)
{
const u32 value = a._u16[i];
spu.gpr[op.rt]._u16[i] = static_cast<u16>(value << b._u16[i]);
spu.gpr[op.rt]._u16[i] = static_cast<u16>(value << (b._u16[i] & 0x1f));
}
}
@ -462,7 +462,7 @@ void spu_interpreter_precise::ROTQMBYBI(SPUThread& spu, spu_opcode_t op)
{
const auto a = spu.gpr[op.ra].vi;
alignas(64) const __m128i buf[3]{a, _mm_setzero_si128(), _mm_setzero_si128()};
spu.gpr[op.rt].vi = _mm_loadu_si128((__m128i*)((u8*)buf + (spu.gpr[op.rb]._u32[3] >> 3 & 0x1f)));
spu.gpr[op.rt].vi = _mm_loadu_si128((__m128i*)((u8*)buf + ((0 - (spu.gpr[op.rb]._u32[3] >> 3)) & 0x1f)));
}
void spu_interpreter_fast::ROTQMBYBI(SPUThread& spu, spu_opcode_t op)
@ -567,7 +567,7 @@ void spu_interpreter_precise::ROTQMBY(SPUThread& spu, spu_opcode_t op)
{
const auto a = spu.gpr[op.ra].vi;
alignas(64) const __m128i buf[3]{a, _mm_setzero_si128(), _mm_setzero_si128()};
spu.gpr[op.rt].vi = _mm_loadu_si128((__m128i*)((u8*)buf + (spu.gpr[op.rb]._u32[3] & 0x1f)));
spu.gpr[op.rt].vi = _mm_loadu_si128((__m128i*)((u8*)buf + (0 - spu.gpr[op.rb]._u32[3] & 0x1f)));
}
void spu_interpreter_fast::ROTQMBY(SPUThread& spu, spu_opcode_t op)
@ -677,7 +677,7 @@ void spu_interpreter_precise::ROTQMBYI(SPUThread& spu, spu_opcode_t op)
{
const auto a = spu.gpr[op.ra].vi;
alignas(64) const __m128i buf[3]{a, _mm_setzero_si128(), _mm_setzero_si128()};
spu.gpr[op.rt].vi = _mm_loadu_si128((__m128i*)((u8*)buf + (op.i7 & 0x1f)));
spu.gpr[op.rt].vi = _mm_loadu_si128((__m128i*)((u8*)buf + (0 - op.i7 & 0x1f)));
}
void spu_interpreter_fast::ROTQMBYI(SPUThread& spu, spu_opcode_t op)