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159 lines
2.9 KiB
PHP
159 lines
2.9 KiB
PHP
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;; GCC assembler includefile for AS1750
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;;
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;; Macros defined:
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;; EFLR.M #d,#s Load the three regs starting at R#s to R#d following.
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;; RET.M #fs Return from function (uses the framesize #fs)
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UC SET 15
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; Return from function ; parameter: framesize
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MACRO RET.M
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IF `1` > 0
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IF `1` <= 16
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AISP R14,`1`
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ELSE
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AIM R14,`1`
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ENDIF
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ENDIF
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LR R15,R14
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URS R15
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ENDMACRO
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; Useful instructions missing from the 1750A standard:
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; Extended Float Load from Registers
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MACRO EFLR.M ; args : #1=dest-regno, #2=source-regno
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ONE SET `1` + 2
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TWO SET `2` + 2
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IF `1` >= `2` || `1`+2 < `2`
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LR R`ONE`,R`TWO`
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DLR R`1`,R`2`
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ELSE
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DLR R`1`,R`2`
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LR R`ONE`,R`TWO`
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DLR R`1`,R`1` ; Just to update condition codes
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ENDIF
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ENDMACRO
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; The following leave the condition codes haywire. But that is
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; accounted for (see notice_update_cc in config/1750a.c.)
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; Double ANd Register with Register
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MACRO DANR.M
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ONE SET `1` + 1
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TWO SET `2` + 1
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ANDR R`1`,R`2`
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ANDR R`ONE`,R`TWO`
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ENDMACRO
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; Double OR Register with Register
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MACRO DORR.M
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ONE SET `1` + 1
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TWO SET `2` + 1
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ORR R`1`,R`2`
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ORR R`ONE`,R`TWO`
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ENDMACRO
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; Double eXoR Register with Register
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MACRO DXRR.M
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ONE SET `1` + 1
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TWO SET `2` + 1
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XORR R`1`,R`2`
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XORR R`ONE`,R`TWO`
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ENDMACRO
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; Double Nand Register with register
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MACRO DNR.M
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ONE SET `1` + 1
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TWO SET `2` + 1
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NR R`1`,R`2`
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NR R`ONE`,R`TWO`
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ENDMACRO
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; Unsigned Compare Immediate
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MACRO UCIM.M
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LAST SET `1` + 3
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PSHM R`1`,R`LAST`
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LO SET `1` + 1
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LR R`LO`,R`1`
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XORR R`1`,R`1`
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HI SET `1` + 2
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XORR R`HI`,R`HI`
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LIM R`LAST`,`2`
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DCR R`1`,R`HI`
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POPM R`1`,R`LAST`
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ENDMACRO
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; Unsigned Compare Register with register
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MACRO UCR.M
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PSHM R10,R13 ; R12 and R13 are assumed not to be input parameters
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LR R13,R`2`
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LR R11,R`1`
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XORR R12,R12
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XORR R10,R10
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DCR R10,R12
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POPM R10,R13
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ENDMACRO
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; Unsigned Compare register with memory
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MACRO UC.M
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PSHM R10,R13
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L R13,`2`
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LR R11,R`1`
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XORR R12,R12
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XORR R10,R10
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DCR R10,R12
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POPM R10,R13
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ENDMACRO
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; Double Unsigned Compare Register with register
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MACRO DUCR.M
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PSHM R13,R14 ; R13 and R14 are assumed not to be input parameters
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LOW1 SET `1` + 1
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LOW2 SET `2` + 1
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PSHM R`1`,R`LOW1`
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PSHM R`2`,R`LOW2`
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LR R13,R`LOW1`
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LR R14,R`LOW2`
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DSRL R`1`,1
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DSRL R`2`,1
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DCR R`1`,R`2`
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BNE +6
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ANDM R13,1
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ANDM R14,1
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CR R13,R14
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POPM R`2`,R`LOW2`
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POPM R`1`,R`LOW1`
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POPM R13,R14
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ENDMACRO
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; Double Unsigned Compare register with memory
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MACRO DUC.M
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PSHM R13,R14 ; R13 and R14 are assumed not to be input parameters
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LOW1 SET `1` + 1
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PSHM R`1`,R`LOW1`
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DL R13,`2`
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DSRL R`1`,1
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DSRL R13,1
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DCR R`1`,R13
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BNE +10 ; done, go pop the saved regs
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DL R13,`2` ; interested in the *low* word (R14)
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L R13,1,R15
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ANDM R13,1
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ANDM R14,1
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CR R13,R14
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POPM R`1`,R`LOW1`
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POPM R13,R14
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ENDMACRO
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