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194 lines
6.6 KiB
C
194 lines
6.6 KiB
C
/* Definitions for Unix assembler syntax for the Intel 80386.
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Copyright (C) 1988, 1994 Free Software Foundation, Inc.
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This file is part of GNU CC.
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GNU CC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GNU CC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GNU CC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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/* This file defines the aspects of assembler syntax
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that are the same for all the i386 Unix systems
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(though they may differ in non-Unix systems). */
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/* Define some concatenation macros to concatenate an opcode
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and one, two or three operands. In other assembler syntaxes
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they may alter the order of ther operands. */
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/* Note that the other files fail to use these
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in some of the places where they should. */
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#if defined(__STDC__) || defined(ALMOST_STDC)
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#define AS2(a,b,c) #a " " #b "," #c
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#define AS2C(b,c) " " #b "," #c
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#define AS3(a,b,c,d) #a " " #b "," #c "," #d
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#define AS1(a,b) #a " " #b
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#else
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#define AS1(a,b) "a b"
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#define AS2(a,b,c) "a b,c"
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#define AS2C(b,c) " b,c"
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#define AS3(a,b,c,d) "a b,c,d"
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#endif
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/* Define macro used to output shift-double opcodes when the shift
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count is in %cl. Some assemblers require %cl as an argument;
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some don't. This macro controls what to do: by default, don't
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print %cl. */
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#define SHIFT_DOUBLE_OMITS_COUNT 1
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#define AS3_SHIFT_DOUBLE(a,b,c,d) \
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(SHIFT_DOUBLE_OMITS_COUNT ? AS2 (a,c,d) : AS3 (a,b,c,d))
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/* Output the size-letter for an opcode.
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CODE is the letter used in an operand spec (L, B, W, S or Q).
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CH is the corresponding lower case letter
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(except if CODE is `Q' then CH is `l', unless GAS_MNEMONICS). */
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#define PUT_OP_SIZE(CODE,CH,FILE) putc (CH,(FILE))
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/* Opcode suffix for fullword insn. */
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#define L_SIZE "l"
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/* Prefix for register names in this syntax. */
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#define RP "%"
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/* Prefix for immediate operands in this syntax. */
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#define IP "$"
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/* Indirect call instructions should use `*'. */
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#define USE_STAR 1
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/* Prefix for a memory-operand X. */
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#define PRINT_PTR(X, FILE)
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/* Delimiters that surround base reg and index reg. */
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#define ADDR_BEG(FILE) putc('(', (FILE))
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#define ADDR_END(FILE) putc(')', (FILE))
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/* Print an index register (whose rtx is IREG). */
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#define PRINT_IREG(FILE,IREG) \
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do \
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{ fputs (",", (FILE)); PRINT_REG ((IREG), 0, (FILE)); } \
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while (0)
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/* Print an index scale factor SCALE. */
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#define PRINT_SCALE(FILE,SCALE) \
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if ((SCALE) != 1) fprintf ((FILE), ",%d", (SCALE))
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/* Print a base/index combination.
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BREG is the base reg rtx, IREG is the index reg rtx,
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and SCALE is the index scale factor (an integer). */
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#define PRINT_B_I_S(BREG,IREG,SCALE,FILE) \
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{ ADDR_BEG (FILE); \
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if (BREG) PRINT_REG ((BREG), 0, (FILE)); \
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if ((IREG) != 0) \
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{ PRINT_IREG ((FILE), (IREG)); \
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PRINT_SCALE ((FILE), (SCALE)); } \
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ADDR_END (FILE); }
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/* Define the syntax of pseudo-ops, labels and comments. */
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/* String containing the assembler's comment-starter. */
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#define ASM_COMMENT_START "/"
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/* Output to assembler file text saying following lines
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may contain character constants, extra white space, comments, etc. */
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#define ASM_APP_ON "/APP\n"
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/* Output to assembler file text saying following lines
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no longer contain unusual constructs. */
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#define ASM_APP_OFF "/NO_APP\n"
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/* Output before read-only data. */
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#define TEXT_SECTION_ASM_OP ".text"
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/* Output before writable (initialized) data. */
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#define DATA_SECTION_ASM_OP ".data"
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/* Output before writable (uninitialized) data. */
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#define BSS_SECTION_ASM_OP ".bss"
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/* This is how to output a command to make the user-level label named NAME
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defined for reference from other files. */
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#define ASM_GLOBALIZE_LABEL(FILE,NAME) \
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(fputs (".globl ", FILE), assemble_name (FILE, NAME), fputs ("\n", FILE))
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/* By default, target has a 80387, uses IEEE compatible arithmetic,
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and returns float values in the 387, ie,
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(TARGET_80387 | TARGET_IEEE_FP | TARGET_FLOAT_RETURNS_IN_80387) */
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#define TARGET_DEFAULT 0301
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/* Floating-point return values come in the FP register. */
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#define VALUE_REGNO(MODE) \
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(GET_MODE_CLASS (MODE) == MODE_FLOAT \
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&& TARGET_FLOAT_RETURNS_IN_80387 ? FIRST_FLOAT_REG : 0)
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/* 1 if N is a possible register number for a function value. */
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#define FUNCTION_VALUE_REGNO_P(N) \
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((N) == 0 || ((N)== FIRST_FLOAT_REG && TARGET_FLOAT_RETURNS_IN_80387))
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/* Output code to add DELTA to the first argument, and then jump to FUNCTION.
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Used for C++ multiple inheritance. */
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#define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
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do { \
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tree parm; \
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\
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if (i386_regparm > 0) \
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parm = TYPE_ARG_TYPES (TREE_TYPE (function)); \
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else \
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parm = NULL_TREE; \
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for (; parm; parm = TREE_CHAIN (parm)) \
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if (TREE_VALUE (parm) == void_type_node) \
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break; \
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fprintf (FILE, "\taddl $%d,%s\n", DELTA, \
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parm ? "%eax" \
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: aggregate_value_p (TREE_TYPE (TREE_TYPE (FUNCTION))) ? "8(%esp)" \
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: "4(%esp)"); \
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\
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if (flag_pic) \
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{ \
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rtx xops[2]; \
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xops[0] = pic_offset_table_rtx; \
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xops[1] = (rtx) gen_label_rtx (); \
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\
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if (i386_regparm > 2) \
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abort (); \
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output_asm_insn ("push%L0 %0", xops); \
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output_asm_insn (AS1 (call,%P1), xops); \
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ASM_OUTPUT_INTERNAL_LABEL (FILE, "L", CODE_LABEL_NUMBER (xops[1])); \
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output_asm_insn (AS1 (pop%L0,%0), xops); \
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output_asm_insn ("addl $_GLOBAL_OFFSET_TABLE_+[.-%P1],%0", xops); \
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fprintf (FILE, "\tmovl "); \
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assemble_name \
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(FILE, IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (FUNCTION))); \
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fprintf (FILE, "@GOT(%%ebx),%%ecx\n\tpopl %%ebx\n\tjmp *%%ecx\n"); \
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} \
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else \
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{ \
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fprintf (FILE, "\tjmp "); \
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assemble_name \
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(FILE, IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (FUNCTION))); \
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fprintf (FILE, "\n"); \
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} \
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} while (0)
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