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43 lines
1.9 KiB
ArmAsm
43 lines
1.9 KiB
ArmAsm
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.include "macro.inc"
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/* assembler directives */
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.set noat /* allow manual use of $at */
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.set noreorder /* don't insert nops after branches */
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.set gp=64 /* allow use of 64-bit general purpose registers */
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.section .text, "ax"
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/* Generated by spimdisasm 1.11.1 */
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# Handwritten function
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glabel __osDisableInt
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/* 46740 8006B340 3C0A8009 */ lui $t2, %hi(__OSGlobalIntMask)
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/* 46744 8006B344 254A5890 */ addiu $t2, $t2, %lo(__OSGlobalIntMask)
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/* 46748 8006B348 8D4B0000 */ lw $t3, 0x0($t2)
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/* 4674C 8006B34C 316BFF00 */ andi $t3, $t3, 0xFF00
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/* 46750 8006B350 40086000 */ mfc0 $t0, $12 # handwritten instruction
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/* 46754 8006B354 2401FFFE */ addiu $at, $zero, -0x2
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/* 46758 8006B358 01014824 */ and $t1, $t0, $at
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/* 4675C 8006B35C 40896000 */ mtc0 $t1, $12 # handwritten instruction
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/* 46760 8006B360 31020001 */ andi $v0, $t0, 0x1
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/* 46764 8006B364 8D480000 */ lw $t0, 0x0($t2)
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/* 46768 8006B368 3108FF00 */ andi $t0, $t0, 0xFF00
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/* 4676C 8006B36C 110B000E */ beq $t0, $t3, .LJP_8006B3A8
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/* 46770 8006B370 3C0A8009 */ lui $t2, %hi(__osRunningThread)
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/* 46774 8006B374 254A4640 */ addiu $t2, $t2, %lo(__osRunningThread)
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/* 46778 8006B378 8D490118 */ lw $t1, 0x118($t2)
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/* 4677C 8006B37C 312AFF00 */ andi $t2, $t1, 0xFF00
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/* 46780 8006B380 01485024 */ and $t2, $t2, $t0
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/* 46784 8006B384 3C01FFFF */ lui $at, (0xFFFF00FF >> 16)
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/* 46788 8006B388 342100FF */ ori $at, $at, (0xFFFF00FF & 0xFFFF)
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/* 4678C 8006B38C 01214824 */ and $t1, $t1, $at
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/* 46790 8006B390 012A4825 */ or $t1, $t1, $t2
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/* 46794 8006B394 2401FFFE */ addiu $at, $zero, -0x2
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/* 46798 8006B398 01214824 */ and $t1, $t1, $at
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/* 4679C 8006B39C 40896000 */ mtc0 $t1, $12 # handwritten instruction
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/* 467A0 8006B3A0 00000000 */ nop
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/* 467A4 8006B3A4 00000000 */ nop
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.LJP_8006B3A8:
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/* 467A8 8006B3A8 03E00008 */ jr $ra
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/* 467AC 8006B3AC 00000000 */ nop
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