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.include "macro.inc"
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/* assembler directives */
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.set noat /* allow manual use of $at */
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.set noreorder /* don't insert nops after branches */
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.set gp=64 /* allow use of 64-bit general purpose registers */
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.section .text, "ax"
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/* Generated by spimdisasm 1.11.1 */
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glabel guMtxL2F
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/* 42960 80067560 3C013780 */ lui $at, (0x37800000 >> 16)
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/* 42964 80067564 44810000 */ mtc1 $at, $f0
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/* 42968 80067568 3C19FFFF */ lui $t9, (0xFFFF0000 >> 16)
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/* 4296C 8006756C 24B80020 */ addiu $t8, $a1, 0x20
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.LJP_80067570:
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/* 42970 80067570 8CA80000 */ lw $t0, 0x0($a1)
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/* 42974 80067574 8CA90020 */ lw $t1, 0x20($a1)
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/* 42978 80067578 01195024 */ and $t2, $t0, $t9
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/* 4297C 8006757C 00095C02 */ srl $t3, $t1, 16
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/* 42980 80067580 014B6025 */ or $t4, $t2, $t3
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/* 42984 80067584 00086C00 */ sll $t5, $t0, 16
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/* 42988 80067588 312EFFFF */ andi $t6, $t1, 0xFFFF
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/* 4298C 8006758C 01AE7825 */ or $t7, $t5, $t6
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/* 42990 80067590 448C2000 */ mtc1 $t4, $f4
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/* 42994 80067594 00000000 */ nop
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/* 42998 80067598 468021A0 */ cvt.s.w $f6, $f4
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/* 4299C 8006759C 46003202 */ mul.s $f8, $f6, $f0
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/* 429A0 800675A0 448F5000 */ mtc1 $t7, $f10
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/* 429A4 800675A4 00000000 */ nop
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/* 429A8 800675A8 46805420 */ cvt.s.w $f16, $f10
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/* 429AC 800675AC 46008482 */ mul.s $f18, $f16, $f0
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/* 429B0 800675B0 E4880000 */ swc1 $f8, 0x0($a0)
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/* 429B4 800675B4 E4920004 */ swc1 $f18, 0x4($a0)
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/* 429B8 800675B8 24A50004 */ addiu $a1, $a1, 0x4
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/* 429BC 800675BC 14B8FFEC */ bne $a1, $t8, .LJP_80067570
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/* 429C0 800675C0 24840008 */ addiu $a0, $a0, 0x8
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/* 429C4 800675C4 03E00008 */ jr $ra
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/* 429C8 800675C8 00000000 */ nop
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/* 429CC 800675CC 00000000 */ nop
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/* 429D0 800675D0 00000000 */ nop
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/* 429D4 800675D4 00000000 */ nop
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/* 429D8 800675D8 00000000 */ nop
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/* 429DC 800675DC 00000000 */ nop
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