Use designated inits for data tables and AC 0A data migration (#538)

* data tables and minor data migration

* remove redundant comments
This commit is contained in:
Alexander Faßbender 2021-11-23 16:26:32 +01:00 committed by GitHub
parent 89b21600b1
commit bb5c96a417
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 868 additions and 867 deletions

File diff suppressed because it is too large Load Diff

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@ -4,6 +4,7 @@
#define NAMESPACE action_command_0A #define NAMESPACE action_command_0A
extern s32 D_802942E0; extern s32 D_802942E0;
extern s32 D_80108B80;
extern HudElementAnim D_80292974; extern HudElementAnim D_80292974;
extern HudElementAnim D_80108AFC; extern HudElementAnim D_80108AFC;
extern HudElementAnim D_80108B28; extern HudElementAnim D_80108B28;

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@ -1,6 +0,0 @@
.include "macro.inc"
.section .data
dlabel jtbl_802A9680_427A30
.word L802A92D4_427684, L802A9330_4276E0, L802A9544_4278F4, L802A9544_4278F4, L802A9544_4278F4, L802A9544_4278F4, L802A9544_4278F4, L802A9544_4278F4, L802A9544_4278F4, L802A9544_4278F4, L802A9388_427738, L802A93D0_427780, L802A9524_4278D4, 0, 0, 0

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@ -1,6 +1,12 @@
.set noat # allow manual use of $at .set noat # allow manual use of $at
.set noreorder # don't insert nops after branches .set noreorder # don't insert nops after branches
.section .rodata
dlabel jtbl_802A9680_427A30
.word .L802A92D4_427684, .L802A9330_4276E0, .L802A9544_4278F4, .L802A9544_4278F4, .L802A9544_4278F4, .L802A9544_4278F4, .L802A9544_4278F4, .L802A9544_4278F4, .L802A9544_4278F4, .L802A9544_4278F4, .L802A9388_427738, .L802A93D0_427780, .L802A9524_4278D4, 0, 0, 0
.section .text
glabel func_802A928C_42763C glabel func_802A928C_42763C
/* 42763C 802A928C 27BDFFE0 */ addiu $sp, $sp, -0x20 /* 42763C 802A928C 27BDFFE0 */ addiu $sp, $sp, -0x20
/* 427640 802A9290 AFB10014 */ sw $s1, 0x14($sp) /* 427640 802A9290 AFB10014 */ sw $s1, 0x14($sp)
@ -13,14 +19,14 @@ glabel func_802A928C_42763C
/* 42765C 802A92AC 3C12800E */ lui $s2, %hi(gBattleStatus) /* 42765C 802A92AC 3C12800E */ lui $s2, %hi(gBattleStatus)
/* 427660 802A92B0 2652C070 */ addiu $s2, $s2, %lo(gBattleStatus) /* 427660 802A92B0 2652C070 */ addiu $s2, $s2, %lo(gBattleStatus)
/* 427664 802A92B4 2C62000D */ sltiu $v0, $v1, 0xd /* 427664 802A92B4 2C62000D */ sltiu $v0, $v1, 0xd
/* 427668 802A92B8 104000A2 */ beqz $v0, L802A9544_4278F4 /* 427668 802A92B8 104000A2 */ beqz $v0, .L802A9544_4278F4
/* 42766C 802A92BC 00031080 */ sll $v0, $v1, 2 /* 42766C 802A92BC 00031080 */ sll $v0, $v1, 2
/* 427670 802A92C0 3C01802B */ lui $at, %hi(jtbl_802A9680_427A30) /* 427670 802A92C0 3C01802B */ lui $at, %hi(jtbl_802A9680_427A30)
/* 427674 802A92C4 00220821 */ addu $at, $at, $v0 /* 427674 802A92C4 00220821 */ addu $at, $at, $v0
/* 427678 802A92C8 8C229680 */ lw $v0, %lo(jtbl_802A9680_427A30)($at) /* 427678 802A92C8 8C229680 */ lw $v0, %lo(jtbl_802A9680_427A30)($at)
/* 42767C 802A92CC 00400008 */ jr $v0 /* 42767C 802A92CC 00400008 */ jr $v0
/* 427680 802A92D0 00000000 */ nop /* 427680 802A92D0 00000000 */ nop
dlabel L802A92D4_427684 .L802A92D4_427684:
/* 427684 802A92D4 0C093EB1 */ jal btl_set_popup_duration /* 427684 802A92D4 0C093EB1 */ jal btl_set_popup_duration
/* 427688 802A92D8 24040063 */ addiu $a0, $zero, 0x63 /* 427688 802A92D8 24040063 */ addiu $a0, $zero, 0x63
/* 42768C 802A92DC 8E300004 */ lw $s0, 4($s1) /* 42768C 802A92DC 8E300004 */ lw $s0, 4($s1)
@ -44,9 +50,9 @@ dlabel L802A92D4_427684
/* 4276D0 802A9320 24050002 */ addiu $a1, $zero, 2 /* 4276D0 802A9320 24050002 */ addiu $a1, $zero, 2
.L802A9324: .L802A9324:
/* 4276D4 802A9324 24020001 */ addiu $v0, $zero, 1 /* 4276D4 802A9324 24020001 */ addiu $v0, $zero, 1
/* 4276D8 802A9328 080AA551 */ j L802A9544_4278F4 /* 4276D8 802A9328 080AA551 */ j .L802A9544_4278F4
/* 4276DC 802A932C A622004C */ sh $v0, 0x4c($s1) /* 4276DC 802A932C A622004C */ sh $v0, 0x4c($s1)
dlabel L802A9330_4276E0 .L802A9330_4276E0:
/* 4276E0 802A9330 0C093EB1 */ jal btl_set_popup_duration /* 4276E0 802A9330 0C093EB1 */ jal btl_set_popup_duration
/* 4276E4 802A9334 24040063 */ addiu $a0, $zero, 0x63 /* 4276E4 802A9334 24040063 */ addiu $a0, $zero, 0x63
/* 4276E8 802A9338 96220056 */ lhu $v0, 0x56($s1) /* 4276E8 802A9338 96220056 */ lhu $v0, 0x56($s1)
@ -68,16 +74,16 @@ dlabel L802A9330_4276E0
/* 427724 802A9374 86250056 */ lh $a1, 0x56($s1) /* 427724 802A9374 86250056 */ lh $a1, 0x56($s1)
/* 427728 802A9378 0C051261 */ jal set_hud_element_render_pos /* 427728 802A9378 0C051261 */ jal set_hud_element_render_pos
/* 42772C 802A937C 24C6001C */ addiu $a2, $a2, 0x1c /* 42772C 802A937C 24C6001C */ addiu $a2, $a2, 0x1c
/* 427730 802A9380 080AA551 */ j L802A9544_4278F4 /* 427730 802A9380 080AA551 */ j .L802A9544_4278F4
/* 427734 802A9384 00000000 */ nop /* 427734 802A9384 00000000 */ nop
dlabel L802A9388_427738 .L802A9388_427738:
/* 427738 802A9388 0C093EB1 */ jal btl_set_popup_duration /* 427738 802A9388 0C093EB1 */ jal btl_set_popup_duration
/* 42773C 802A938C 24040063 */ addiu $a0, $zero, 0x63 /* 42773C 802A938C 24040063 */ addiu $a0, $zero, 0x63
/* 427740 802A9390 8622004E */ lh $v0, 0x4e($s1) /* 427740 802A9390 8622004E */ lh $v0, 0x4e($s1)
/* 427744 802A9394 9623004E */ lhu $v1, 0x4e($s1) /* 427744 802A9394 9623004E */ lhu $v1, 0x4e($s1)
/* 427748 802A9398 10400003 */ beqz $v0, .L802A93A8 /* 427748 802A9398 10400003 */ beqz $v0, .L802A93A8
/* 42774C 802A939C 2462FFFF */ addiu $v0, $v1, -1 /* 42774C 802A939C 2462FFFF */ addiu $v0, $v1, -1
/* 427750 802A93A0 080AA551 */ j L802A9544_4278F4 /* 427750 802A93A0 080AA551 */ j .L802A9544_4278F4
/* 427754 802A93A4 A622004E */ sh $v0, 0x4e($s1) /* 427754 802A93A4 A622004E */ sh $v0, 0x4e($s1)
.L802A93A8: .L802A93A8:
/* 427758 802A93A8 8E240004 */ lw $a0, 4($s1) /* 427758 802A93A8 8E240004 */ lw $a0, 4($s1)
@ -90,7 +96,7 @@ dlabel L802A9388_427738
/* 427774 802A93C4 A6200044 */ sh $zero, 0x44($s1) /* 427774 802A93C4 A6200044 */ sh $zero, 0x44($s1)
/* 427778 802A93C8 A622004C */ sh $v0, 0x4c($s1) /* 427778 802A93C8 A622004C */ sh $v0, 0x4c($s1)
/* 42777C 802A93CC A6230054 */ sh $v1, 0x54($s1) /* 42777C 802A93CC A6230054 */ sh $v1, 0x54($s1)
dlabel L802A93D0_427780 .L802A93D0_427780:
/* 427780 802A93D0 0C093EB1 */ jal btl_set_popup_duration /* 427780 802A93D0 0C093EB1 */ jal btl_set_popup_duration
/* 427784 802A93D4 24040063 */ addiu $a0, $zero, 0x63 /* 427784 802A93D4 24040063 */ addiu $a0, $zero, 0x63
/* 427788 802A93D8 8E420214 */ lw $v0, 0x214($s2) /* 427788 802A93D8 8E420214 */ lw $v0, 0x214($s2)
@ -180,20 +186,20 @@ dlabel L802A93D0_427780
/* 4278C0 802A9510 24020005 */ addiu $v0, $zero, 5 /* 4278C0 802A9510 24020005 */ addiu $v0, $zero, 5
/* 4278C4 802A9514 A6220054 */ sh $v0, 0x54($s1) /* 4278C4 802A9514 A6220054 */ sh $v0, 0x54($s1)
/* 4278C8 802A9518 2402000C */ addiu $v0, $zero, 0xc /* 4278C8 802A9518 2402000C */ addiu $v0, $zero, 0xc
/* 4278CC 802A951C 080AA551 */ j L802A9544_4278F4 /* 4278CC 802A951C 080AA551 */ j .L802A9544_4278F4
/* 4278D0 802A9520 A622004C */ sh $v0, 0x4c($s1) /* 4278D0 802A9520 A622004C */ sh $v0, 0x4c($s1)
dlabel L802A9524_4278D4 .L802A9524_4278D4:
/* 4278D4 802A9524 86220054 */ lh $v0, 0x54($s1) /* 4278D4 802A9524 86220054 */ lh $v0, 0x54($s1)
/* 4278D8 802A9528 96230054 */ lhu $v1, 0x54($s1) /* 4278D8 802A9528 96230054 */ lhu $v1, 0x54($s1)
/* 4278DC 802A952C 10400003 */ beqz $v0, .L802A953C /* 4278DC 802A952C 10400003 */ beqz $v0, .L802A953C
/* 4278E0 802A9530 2462FFFF */ addiu $v0, $v1, -1 /* 4278E0 802A9530 2462FFFF */ addiu $v0, $v1, -1
.L802A9534: .L802A9534:
/* 4278E4 802A9534 080AA551 */ j L802A9544_4278F4 /* 4278E4 802A9534 080AA551 */ j .L802A9544_4278F4
/* 4278E8 802A9538 A6220054 */ sh $v0, 0x54($s1) /* 4278E8 802A9538 A6220054 */ sh $v0, 0x54($s1)
.L802A953C: .L802A953C:
/* 4278EC 802A953C 0C09A327 */ jal func_80268C9C /* 4278EC 802A953C 0C09A327 */ jal func_80268C9C
/* 4278F0 802A9540 00000000 */ nop /* 4278F0 802A9540 00000000 */ nop
dlabel L802A9544_4278F4 .L802A9544_4278F4:
/* 4278F4 802A9544 8FBF001C */ lw $ra, 0x1c($sp) /* 4278F4 802A9544 8FBF001C */ lw $ra, 0x1c($sp)
/* 4278F8 802A9548 8FB20018 */ lw $s2, 0x18($sp) /* 4278F8 802A9548 8FB20018 */ lw $s2, 0x18($sp)
/* 4278FC 802A954C 8FB10014 */ lw $s1, 0x14($sp) /* 4278FC 802A954C 8FB10014 */ lw $s1, 0x14($sp)

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@ -3554,7 +3554,7 @@ segments:
overlay: True overlay: True
subsegments: subsegments:
- [0x4273B0, c, 0A] - [0x4273B0, c, 0A]
- [0x427A30, data] - [0x427A30]
- type: code - type: code
start: 0x427A70 start: 0x427A70
vram: 0x802A9000 vram: 0x802A9000