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Merge pull request #1 from pixel-stuck/master

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Cleanup YAML, include Yay0 compressed assets, build all assembly and data files separately
This commit is contained in:
Ethan Roseman 2020-04-28 02:08:08 -04:00 committed by GitHub
commit eebc4081b8
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GPG Key ID: 4AEE18F83AFDEB23
213 changed files with 9949 additions and 25384 deletions
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5815
PAPER_MARIO.u.yaml
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53
papermario/Makefile
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@ -5,6 +5,26 @@
# BUILD_DIR is location where all build artifacts are placed # BUILD_DIR is location where all build artifacts are placed
BUILD_DIR = build BUILD_DIR = build
SRC_DIRS := src
ASM_DIRS := asm
DATA_DIRS := bin
COMPRESSED_DIRS := COMPRESSED.YAY
MAP_DIRS := Map_Assets.FS
# Source code files
C_FILES := $(foreach dir,$(SRC_DIRS),$(wildcard $(dir)/*.c))
S_FILES := $(foreach dir,$(ASM_DIRS),$(wildcard $(dir)/*.s))
DATA_FILES := $(foreach dir,$(DATA_DIRS),$(wildcard $(dir)/*.bin))
COMPRESSED_FILES := $(foreach dir,$(COMPRESSED_DIRS),$(wildcard $(dir)/*.YAY))
MAP_FILES := $(foreach dir,$(MAP_DIRS),$(wildcard $(dir)/*.FS))
# Object files
O_FILES := $(foreach file,$(C_FILES),$(BUILD_DIR)/$(file:.c=.o)) \
$(foreach file,$(S_FILES),$(BUILD_DIR)/$(file:.s=.o)) \
$(foreach file,$(DATA_FILES),$(BUILD_DIR)/$(file:.bin=.o)) \
$(foreach file,$(COMPRESSED_FILES),$(BUILD_DIR)/$(file:.YAY=.YAY.o)) \
$(foreach file,$(MAP_FILES),$(BUILD_DIR)/$(file:.FS=.FS.o)) \
##################### Compiler Options ####################### ##################### Compiler Options #######################
CROSS = mips-linux-gnu- CROSS = mips-linux-gnu-
AS = $(CROSS)as AS = $(CROSS)as
@ -32,6 +52,7 @@ LOADER_FLAGS = -vwf
FixPath = $(subst /,\,$1) FixPath = $(subst /,\,$1)
######################## Targets ############################# ######################## Targets #############################
$(foreach dir,$(SRC_DIRS) $(ASM_DIRS) $(DATA_DIRS) $(COMPRESSED_DIRS) $(MAP_DIRS),$(shell mkdir -p build/$(dir)))
default: all default: all
@ -44,20 +65,28 @@ all: fix_asm $(TARGET).z64 verify
clean: clean:
rm -rf build rm -rf build
$(MIO0_DIR)/%.mio0: $(MIO0_DIR)/%.bin print-% : ; $(info $* is a $(flavor $*) variable set to [$($*)]) @true
$(MIO0TOOL) $< $@
$(BUILD_DIR): $(BUILD_DIR):
mkdir $(BUILD_DIR) mkdir $(BUILD_DIR)
$(BUILD_DIR)/$(TARGET).o: $(TARGET).s Makefile $(MAKEFILE_SPLIT) $(MIO0_FILES) $(LEVEL_FILES) $(MUSIC_FILES) | $(BUILD_DIR) $(BUILD_DIR)/$(TARGET).elf: $(O_FILES) $(LD_SCRIPT) $(BUILD_DIR)
$(LD) $(LDFLAGS) -o $@ $(O_FILES)
$(BUILD_DIR)/%.o: %.s $(BUILD_DIR)
$(AS) $(ASFLAGS) -o $@ $< $(AS) $(ASFLAGS) -o $@ $<
$(BUILD_DIR)/%.o: %.c Makefile.as | $(BUILD_DIR) $(BUILD_DIR)/%.o: %.c $(BUILD_DIR)
$(CC) $(CFLAGS) -o $@ $< $(CC) $(CFLAGS) -o $@ $<
$(BUILD_DIR)/$(TARGET).elf: $(BUILD_DIR)/$(TARGET).o $(LD_SCRIPT) $(BUILD_DIR)/%.o: %.bin $(BUILD_DIR)
$(LD) $(LDFLAGS) -o $@ $< $(LIBS) $(LD) -r -b binary -o $@ $<
$(BUILD_DIR)/%.YAY.o: %.YAY $(BUILD_DIR)
$(LD) -r -b binary -o $@ $<
$(BUILD_DIR)/%.FS.o: %.FS $(BUILD_DIR)
$(LD) -r -b binary -o $@ $<
$(BUILD_DIR)/$(TARGET).bin: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).bin: $(BUILD_DIR)/$(TARGET).elf
$(OBJCOPY) $< $@ -O binary $(OBJCOPY) $< $@ -O binary
@ -69,18 +98,6 @@ $(TARGET).z64: $(BUILD_DIR)/$(TARGET).bin
fix_asm: fix_asm:
./fix_asm.py ./fix_asm.py
$(BUILD_DIR)/$(TARGET).hex: $(TARGET).z64
xxd $< > $@
$(BUILD_DIR)/$(TARGET).objdump: $(BUILD_DIR)/$(TARGET).elf
$(OBJDUMP) -D $< > $@
test: $(TARGET).z64
$(EMULATOR) $(EMU_FLAGS) $<
load: $(TARGET).z64
$(LOADER) $(LOADER_FLAGS) $<
verify: $(TARGET).z64 verify: $(TARGET).z64
md5sum -c checksum.md5 md5sum -c checksum.md5

14
papermario/Makefile.split
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@ -1,16 +1,2 @@
TARGET = PAPERMARIO TARGET = PAPERMARIO
LD_SCRIPT = $(TARGET).ld LD_SCRIPT = $(TARGET).ld
MIO0_DIR = bin
TEXTURE_DIR = textures
GEO_DIR = geo
LEVEL_DIR = levels
MUSIC_DIR = music
MIO0_FILES =
LEVEL_FILES =
MUSIC_FILES =

2931
papermario/PAPERMARIO.ld
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18462
papermario/PAPERMARIO.s
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14
papermario/asm/CODE_163400.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80242BA0, "ax" .section .text80242BA0, "ax"
@ -3396,7 +3406,7 @@ func_80245B70:
/* 16647C 80245C1C 00000000 */ nop /* 16647C 80245C1C 00000000 */ nop
/* 166480 80245C20 92620002 */ lbu $v0, 2($s3) /* 166480 80245C20 92620002 */ lbu $v0, 2($s3)
/* 166484 80245C24 2C420002 */ sltiu $v0, $v0, 2 /* 166484 80245C24 2C420002 */ sltiu $v0, $v0, 2
/* 166488 80245C28 54400010 */ bnezl $v0, .L80245C6C /* 166488 80245C28 54400010 */ bnel $v0, $zero, .L80245C6C
/* 16648C 80245C2C A2600001 */ sb $zero, 1($s3) /* 16648C 80245C2C A2600001 */ sb $zero, 1($s3)
/* 166490 80245C30 0809171B */ j func_80245C6C /* 166490 80245C30 0809171B */ j func_80245C6C
/* 166494 80245C34 00000000 */ nop /* 166494 80245C34 00000000 */ nop
@ -3407,7 +3417,7 @@ func_80245B70:
/* 1664A4 80245C44 00000000 */ nop /* 1664A4 80245C44 00000000 */ nop
/* 1664A8 80245C48 92620002 */ lbu $v0, 2($s3) /* 1664A8 80245C48 92620002 */ lbu $v0, 2($s3)
/* 1664AC 80245C4C 2C420002 */ sltiu $v0, $v0, 2 /* 1664AC 80245C4C 2C420002 */ sltiu $v0, $v0, 2
/* 1664B0 80245C50 54400001 */ bnezl $v0, .L80245C58 /* 1664B0 80245C50 54400001 */ bnel $v0, $zero, .L80245C58
/* 1664B4 80245C54 A2600001 */ sb $zero, 1($s3) /* 1664B4 80245C54 A2600001 */ sb $zero, 1($s3)
.L80245C58: .L80245C58:
/* 1664B8 80245C58 82630002 */ lb $v1, 2($s3) /* 1664B8 80245C58 82630002 */ lb $v1, 2($s3)

10
papermario/asm/CODE_3169f0.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80200000, "ax" .section .text80200000, "ax"

10
papermario/asm/CODE_316a70.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80200080, "ax" .section .text80200080, "ax"

10
papermario/asm/CODE_316d90.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text802AE000, "ax" .section .text802AE000, "ax"

10
papermario/asm/CODE_316f30.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text802B2000, "ax" .section .text802B2000, "ax"

16
papermario/asm/CODE_7e0e80.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80280000, "ax" .section .text80280000, "ax"
@ -339,7 +349,7 @@ PartnerTestEnemy:
/* 7E1354 802804D4 3C048028 */ lui $a0, 0x8028 /* 7E1354 802804D4 3C048028 */ lui $a0, 0x8028
/* 7E1358 802804D8 0C0B1059 */ jal does_script_exist /* 7E1358 802804D8 0C0B1059 */ jal does_script_exist
/* 7E135C 802804DC 8C846524 */ lw $a0, 0x6524($a0) /* 7E135C 802804DC 8C846524 */ lw $a0, 0x6524($a0)
/* 7E1360 802804E0 54400008 */ bnezl $v0, .L80280504 /* 7E1360 802804E0 54400008 */ bnel $v0, $zero, .L80280504
/* 7E1364 802804E4 0000102D */ daddu $v0, $zero, $zero /* 7E1364 802804E4 0000102D */ daddu $v0, $zero, $zero
/* 7E1368 802804E8 96020000 */ lhu $v0, ($s0) /* 7E1368 802804E8 96020000 */ lhu $v0, ($s0)
/* 7E136C 802804EC 3042FFF7 */ andi $v0, $v0, 0xfff7 /* 7E136C 802804EC 3042FFF7 */ andi $v0, $v0, 0xfff7
@ -2606,7 +2616,7 @@ func_80282264:
/* 7E32AC 8028242C 10A0000A */ beqz $a1, .L80282458 /* 7E32AC 8028242C 10A0000A */ beqz $a1, .L80282458
/* 7E32B0 80282430 8E320088 */ lw $s2, 0x88($s1) /* 7E32B0 80282430 8E320088 */ lw $s2, 0x88($s1)
/* 7E32B4 80282434 8E220084 */ lw $v0, 0x84($s1) /* 7E32B4 80282434 8E220084 */ lw $v0, 0x84($s1)
/* 7E32B8 80282438 54400007 */ bnezl $v0, .L80282458 /* 7E32B8 80282438 54400007 */ bnel $v0, $zero, .L80282458
/* 7E32BC 8028243C AE200074 */ sw $zero, 0x74($s1) /* 7E32BC 8028243C AE200074 */ sw $zero, 0x74($s1)
/* 7E32C0 80282440 962400C2 */ lhu $a0, 0xc2($s1) /* 7E32C0 80282440 962400C2 */ lhu $a0, 0xc2($s1)
/* 7E32C4 80282444 2405FFFF */ addiu $a1, $zero, -1 /* 7E32C4 80282444 2405FFFF */ addiu $a1, $zero, -1
@ -3530,7 +3540,7 @@ func_8028306C:
.L802831B4: .L802831B4:
/* 7E4034 802831B4 8CA20004 */ lw $v0, 4($a1) /* 7E4034 802831B4 8CA20004 */ lw $v0, 4($a1)
/* 7E4038 802831B8 30420001 */ andi $v0, $v0, 1 /* 7E4038 802831B8 30420001 */ andi $v0, $v0, 1
/* 7E403C 802831BC 54400003 */ bnezl $v0, .L802831CC /* 7E403C 802831BC 54400003 */ bnel $v0, $zero, .L802831CC
/* 7E4040 802831C0 AC8000B8 */ sw $zero, 0xb8($a0) /* 7E4040 802831C0 AC8000B8 */ sw $zero, 0xb8($a0)
/* 7E4044 802831C4 24020001 */ addiu $v0, $zero, 1 /* 7E4044 802831C4 24020001 */ addiu $v0, $zero, 1
/* 7E4048 802831C8 AC8200B8 */ sw $v0, 0xb8($a0) /* 7E4048 802831C8 AC8200B8 */ sw $v0, 0xb8($a0)

10
papermario/asm/CODE_e20eb0.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text802B7000, "ax" .section .text802B7000, "ax"

1550
papermario/asm/boot.s
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10
papermario/asm/code_1000_len_60.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80025C00, "ax" .section .text80025C00, "ax"

10
papermario/asm/code_101b90_len_8f0.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text802DEAA0, "ax" .section .text802DEAA0, "ax"

10
papermario/asm/code_102610_len_2330.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text802E0D90, "ax" .section .text802E0D90, "ax"

10
papermario/asm/code_10400_len_d30.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80035000, "ax" .section .text80035000, "ax"

12
papermario/asm/code_104940_len_dc0.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text802E30C0, "ax" .section .text802E30C0, "ax"
@ -885,7 +895,7 @@ func_802E3D08:
/* 1055B4 802E3D34 3C028011 */ lui $v0, 0x8011 /* 1055B4 802E3D34 3C028011 */ lui $v0, 0x8011
/* 1055B8 802E3D38 8042F290 */ lb $v0, -0xd70($v0) /* 1055B8 802E3D38 8042F290 */ lb $v0, -0xd70($v0)
/* 1055BC 802E3D3C 28420002 */ slti $v0, $v0, 2 /* 1055BC 802E3D3C 28420002 */ slti $v0, $v0, 2
/* 1055C0 802E3D40 54400007 */ bnezl $v0, .L802E3D60 /* 1055C0 802E3D40 54400007 */ bnel $v0, $zero, .L802E3D60
/* 1055C4 802E3D44 0000802D */ daddu $s0, $zero, $zero /* 1055C4 802E3D44 0000802D */ daddu $s0, $zero, $zero
/* 1055C8 802E3D48 080B8F58 */ j func_802E3D60 /* 1055C8 802E3D48 080B8F58 */ j func_802E3D60
/* 1055CC 802E3D4C 00000000 */ nop /* 1055CC 802E3D4C 00000000 */ nop

14
papermario/asm/code_105700_len_2130.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text802E3E80, "ax" .section .text802E3E80, "ax"
@ -911,7 +921,7 @@ func_802E4B60:
/* 106418 802E4B98 0C04417A */ jal get_entity_by_index /* 106418 802E4B98 0C04417A */ jal get_entity_by_index
/* 10641C 802E4B9C 92040000 */ lbu $a0, ($s0) /* 10641C 802E4B9C 92040000 */ lbu $a0, ($s0)
/* 106420 802E4BA0 92020009 */ lbu $v0, 9($s0) /* 106420 802E4BA0 92020009 */ lbu $v0, 9($s0)
/* 106424 802E4BA4 54400009 */ bnezl $v0, .L802E4BCC /* 106424 802E4BA4 54400009 */ bnel $v0, $zero, .L802E4BCC
/* 106428 802E4BA8 A2000001 */ sb $zero, 1($s0) /* 106428 802E4BA8 A2000001 */ sb $zero, 1($s0)
/* 10642C 802E4BAC 3C013F80 */ lui $at, 0x3f80 /* 10642C 802E4BAC 3C013F80 */ lui $at, 0x3f80
/* 106430 802E4BB0 44810000 */ mtc1 $at, $f0 /* 106430 802E4BB0 44810000 */ mtc1 $at, $f0
@ -2207,7 +2217,7 @@ func_802E58FC:
/* 1076E4 802E5E64 0C0B9607 */ jal func_802E581C /* 1076E4 802E5E64 0C0B9607 */ jal func_802E581C
/* 1076E8 802E5E68 8E300040 */ lw $s0, 0x40($s1) /* 1076E8 802E5E68 8E300040 */ lw $s0, 0x40($s1)
/* 1076EC 802E5E6C 9202000A */ lbu $v0, 0xa($s0) /* 1076EC 802E5E6C 9202000A */ lbu $v0, 0xa($s0)
/* 1076F0 802E5E70 54400001 */ bnezl $v0, .L802E5E78 /* 1076F0 802E5E70 54400001 */ bnel $v0, $zero, .L802E5E78
/* 1076F4 802E5E74 AE20003C */ sw $zero, 0x3c($s1) /* 1076F4 802E5E74 AE20003C */ sw $zero, 0x3c($s1)
.L802E5E78: .L802E5E78:
/* 1076F8 802E5E78 C62C0064 */ lwc1 $f12, 0x64($s1) /* 1076F8 802E5E78 C62C0064 */ lwc1 $f12, 0x64($s1)

12
papermario/asm/code_1060_len_310.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80025C60, "ax" .section .text80025C60, "ax"
@ -172,7 +182,7 @@ func_80025CFC:
/* 0012D8 80025ED8 00663025 */ or $a2, $v1, $a2 /* 0012D8 80025ED8 00663025 */ or $a2, $v1, $a2
/* 0012DC 80025EDC 3407FFDF */ ori $a3, $zero, 0xffdf /* 0012DC 80025EDC 3407FFDF */ ori $a3, $zero, 0xffdf
/* 0012E0 80025EE0 00F2102A */ slt $v0, $a3, $s2 /* 0012E0 80025EE0 00F2102A */ slt $v0, $a3, $s2
/* 0012E4 80025EE4 54400001 */ bnezl $v0, .L80025EEC /* 0012E4 80025EE4 54400001 */ bnel $v0, $zero, .L80025EEC
/* 0012E8 80025EE8 02569021 */ addu $s2, $s2, $s6 /* 0012E8 80025EE8 02569021 */ addu $s2, $s2, $s6
.L80025EEC: .L80025EEC:
/* 0012EC 80025EEC 2694FFFF */ addiu $s4, $s4, -1 /* 0012EC 80025EEC 2694FFFF */ addiu $s4, $s4, -1

12
papermario/asm/code_107830_len_e70.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text802E5FB0, "ax" .section .text802E5FB0, "ax"
@ -769,7 +779,7 @@ func_802E69D8:
/* 108350 802E6AD0 AC430000 */ sw $v1, ($v0) /* 108350 802E6AD0 AC430000 */ sw $v1, ($v0)
func_802E6AD4: func_802E6AD4:
.L802E6AD4: .L802E6AD4:
/* 108354 802E6AD4 56400002 */ bnezl $s2, .L802E6AE0 /* 108354 802E6AD4 56400002 */ bnel $s2, $zero, .L802E6AE0
/* 108358 802E6AD8 E6340068 */ swc1 $f20, 0x68($s1) /* 108358 802E6AD8 E6340068 */ swc1 $f20, 0x68($s1)
/* 10835C 802E6ADC E6340060 */ swc1 $f20, 0x60($s1) /* 10835C 802E6ADC E6340060 */ swc1 $f20, 0x60($s1)
.L802E6AE0: .L802E6AE0:

10
papermario/asm/code_1086a0_len_fc0.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text802E6E20, "ax" .section .text802E6E20, "ax"

10
papermario/asm/code_109660_len_1270.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text802E7DE0, "ax" .section .text802E7DE0, "ax"

10
papermario/asm/code_11130_len_c0.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80035D30, "ax" .section .text80035D30, "ax"

10
papermario/asm/code_111f0_len_860.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80035DF0, "ax" .section .text80035DF0, "ax"

10
papermario/asm/code_11a50_len_7a0.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80036650, "ax" .section .text80036650, "ax"

10
papermario/asm/code_121f0_len_1290.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80036DF0, "ax" .section .text80036DF0, "ax"

10
papermario/asm/code_13480_len_3f0.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80038080, "ax" .section .text80038080, "ax"

10
papermario/asm/code_1370_len_7d0.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80025F70, "ax" .section .text80025F70, "ax"

48
papermario/asm/code_13870_len_6980.s
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@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80038470, "ax" .section .text80038470, "ax"
@ -272,7 +282,7 @@ func_800387E8:
/* 013C0C 8003880C AE020078 */ sw $v0, 0x78($s0) /* 013C0C 8003880C AE020078 */ sw $v0, 0x78($s0)
/* 013C10 80038810 E600007C */ swc1 $f0, 0x7c($s0) /* 013C10 80038810 E600007C */ swc1 $f0, 0x7c($s0)
/* 013C14 80038814 80620070 */ lb $v0, 0x70($v1) /* 013C14 80038814 80620070 */ lb $v0, 0x70($v1)
/* 013C18 80038818 54400001 */ bnezl $v0, .L80038820 /* 013C18 80038818 54400001 */ bnel $v0, $zero, .L80038820
/* 013C1C 8003881C 36310800 */ ori $s1, $s1, 0x800 /* 013C1C 8003881C 36310800 */ ori $s1, $s1, 0x800
.L80038820: .L80038820:
/* 013C20 80038820 0220102D */ daddu $v0, $s1, $zero /* 013C20 80038820 0220102D */ daddu $v0, $s1, $zero
@ -892,7 +902,7 @@ func_8003900C:
/* 0144C0 800390C0 3C028000 */ lui $v0, 0x8000 /* 0144C0 800390C0 3C028000 */ lui $v0, 0x8000
/* 0144C4 800390C4 34420100 */ ori $v0, $v0, 0x100 /* 0144C4 800390C4 34420100 */ ori $v0, $v0, 0x100
/* 0144C8 800390C8 00621024 */ and $v0, $v1, $v0 /* 0144C8 800390C8 00621024 */ and $v0, $v1, $v0
/* 0144CC 800390CC 54400070 */ bnezl $v0, .L80039290 /* 0144CC 800390CC 54400070 */ bnel $v0, $zero, .L80039290
/* 0144D0 800390D0 26520001 */ addiu $s2, $s2, 1 /* 0144D0 800390D0 26520001 */ addiu $s2, $s2, 1
/* 0144D4 800390D4 860200A8 */ lh $v0, 0xa8($s0) /* 0144D4 800390D4 860200A8 */ lh $v0, 0xa8($s0)
/* 0144D8 800390D8 C602003C */ lwc1 $f2, 0x3c($s0) /* 0144D8 800390D8 C602003C */ lwc1 $f2, 0x3c($s0)
@ -1754,11 +1764,11 @@ func_80039CE8:
/* 015108 80039D08 8E030000 */ lw $v1, ($s0) /* 015108 80039D08 8E030000 */ lw $v1, ($s0)
/* 01510C 80039D0C 3C024000 */ lui $v0, 0x4000 /* 01510C 80039D0C 3C024000 */ lui $v0, 0x4000
/* 015110 80039D10 00621024 */ and $v0, $v1, $v0 /* 015110 80039D10 00621024 */ and $v0, $v1, $v0
/* 015114 80039D14 54400018 */ bnezl $v0, .L80039D78 /* 015114 80039D14 54400018 */ bnel $v0, $zero, .L80039D78
/* 015118 80039D18 26520001 */ addiu $s2, $s2, 1 /* 015118 80039D18 26520001 */ addiu $s2, $s2, 1
/* 01511C 80039D1C 3C020100 */ lui $v0, 0x100 /* 01511C 80039D1C 3C020100 */ lui $v0, 0x100
/* 015120 80039D20 00621024 */ and $v0, $v1, $v0 /* 015120 80039D20 00621024 */ and $v0, $v1, $v0
/* 015124 80039D24 54400014 */ bnezl $v0, .L80039D78 /* 015124 80039D24 54400014 */ bnel $v0, $zero, .L80039D78
/* 015128 80039D28 26520001 */ addiu $s2, $s2, 1 /* 015128 80039D28 26520001 */ addiu $s2, $s2, 1
/* 01512C 80039D2C 8E030024 */ lw $v1, 0x24($s0) /* 01512C 80039D2C 8E030024 */ lw $v1, 0x24($s0)
/* 015130 80039D30 04630011 */ bgezl $v1, .L80039D78 /* 015130 80039D30 04630011 */ bgezl $v1, .L80039D78
@ -1927,7 +1937,7 @@ func_80039F08:
/* 01536C 80039F6C 8E220000 */ lw $v0, ($s1) /* 01536C 80039F6C 8E220000 */ lw $v0, ($s1)
/* 015370 80039F70 3C030020 */ lui $v1, 0x20 /* 015370 80039F70 3C030020 */ lui $v1, 0x20
/* 015374 80039F74 00431024 */ and $v0, $v0, $v1 /* 015374 80039F74 00431024 */ and $v0, $v0, $v1
/* 015378 80039F78 54400001 */ bnezl $v0, .L80039F80 /* 015378 80039F78 54400001 */ bnel $v0, $zero, .L80039F80
/* 01537C 80039F7C A620008C */ sh $zero, 0x8c($s1) /* 01537C 80039F7C A620008C */ sh $zero, 0x8c($s1)
.L80039F80: .L80039F80:
/* 015380 80039F80 8622008C */ lh $v0, 0x8c($s1) /* 015380 80039F80 8622008C */ lh $v0, 0x8c($s1)
@ -2554,7 +2564,7 @@ render_npcs:
/* 015C9C 8003A89C 3C028100 */ lui $v0, 0x8100 /* 015C9C 8003A89C 3C028100 */ lui $v0, 0x8100
/* 015CA0 8003A8A0 34420006 */ ori $v0, $v0, 6 /* 015CA0 8003A8A0 34420006 */ ori $v0, $v0, 6
/* 015CA4 8003A8A4 00621024 */ and $v0, $v1, $v0 /* 015CA4 8003A8A4 00621024 */ and $v0, $v1, $v0
/* 015CA8 8003A8A8 5440005B */ bnezl $v0, .L8003AA18 /* 015CA8 8003A8A8 5440005B */ bnel $v0, $zero, .L8003AA18
/* 015CAC 8003A8AC 26520001 */ addiu $s2, $s2, 1 /* 015CAC 8003A8AC 26520001 */ addiu $s2, $s2, 1
/* 015CB0 8003A8B0 3C013F80 */ lui $at, 0x3f80 /* 015CB0 8003A8B0 3C013F80 */ lui $at, 0x3f80
/* 015CB4 8003A8B4 44810000 */ mtc1 $at, $f0 /* 015CB4 8003A8B4 44810000 */ mtc1 $at, $f0
@ -3006,7 +3016,7 @@ func_8003AEB4:
/* 0162C0 8003AEC0 82C20001 */ lb $v0, 1($s6) /* 0162C0 8003AEC0 82C20001 */ lb $v0, 1($s6)
/* 0162C4 8003AEC4 1242009C */ beq $s2, $v0, .L8003B138 /* 0162C4 8003AEC4 1242009C */ beq $s2, $v0, .L8003B138
/* 0162C8 8003AEC8 2A620003 */ slti $v0, $s3, 3 /* 0162C8 8003AEC8 2A620003 */ slti $v0, $s3, 3
/* 0162CC 8003AECC 5440FFF9 */ bnezl $v0, .L8003AEB4 /* 0162CC 8003AECC 5440FFF9 */ bnel $v0, $zero, .L8003AEB4
/* 0162D0 8003AED0 2652FFFF */ addiu $s2, $s2, -1 /* 0162D0 8003AED0 2652FFFF */ addiu $s2, $s2, -1
/* 0162D4 8003AED4 0000982D */ daddu $s3, $zero, $zero /* 0162D4 8003AED4 0000982D */ daddu $s3, $zero, $zero
/* 0162D8 8003AED8 26B50001 */ addiu $s5, $s5, 1 /* 0162D8 8003AED8 26B50001 */ addiu $s5, $s5, 1
@ -3142,11 +3152,11 @@ func_8003AEB4:
/* 0164CC 8003B0CC 8E030000 */ lw $v1, ($s0) /* 0164CC 8003B0CC 8E030000 */ lw $v1, ($s0)
/* 0164D0 8003B0D0 3C024000 */ lui $v0, 0x4000 /* 0164D0 8003B0D0 3C024000 */ lui $v0, 0x4000
/* 0164D4 8003B0D4 00621024 */ and $v0, $v1, $v0 /* 0164D4 8003B0D4 00621024 */ and $v0, $v1, $v0
/* 0164D8 8003B0D8 5440000E */ bnezl $v0, .L8003B114 /* 0164D8 8003B0D8 5440000E */ bnel $v0, $zero, .L8003B114
/* 0164DC 8003B0DC AFB70010 */ sw $s7, 0x10($sp) /* 0164DC 8003B0DC AFB70010 */ sw $s7, 0x10($sp)
/* 0164E0 8003B0E0 3C020100 */ lui $v0, 0x100 /* 0164E0 8003B0E0 3C020100 */ lui $v0, 0x100
/* 0164E4 8003B0E4 00621024 */ and $v0, $v1, $v0 /* 0164E4 8003B0E4 00621024 */ and $v0, $v1, $v0
/* 0164E8 8003B0E8 5440FF72 */ bnezl $v0, .L8003AEB4 /* 0164E8 8003B0E8 5440FF72 */ bnel $v0, $zero, .L8003AEB4
/* 0164EC 8003B0EC 2652FFFF */ addiu $s2, $s2, -1 /* 0164EC 8003B0EC 2652FFFF */ addiu $s2, $s2, -1
/* 0164F0 8003B0F0 4600A20D */ trunc.w.s $f8, $f20 /* 0164F0 8003B0F0 4600A20D */ trunc.w.s $f8, $f20
/* 0164F4 8003B0F4 44054000 */ mfc1 $a1, $f8 /* 0164F4 8003B0F4 44054000 */ mfc1 $a1, $f8
@ -3228,7 +3238,7 @@ func_8003B1B0:
/* 0165F8 8003B1F8 50600046 */ beql $v1, $zero, .L8003B314 /* 0165F8 8003B1F8 50600046 */ beql $v1, $zero, .L8003B314
/* 0165FC 8003B1FC 26520001 */ addiu $s2, $s2, 1 /* 0165FC 8003B1FC 26520001 */ addiu $s2, $s2, 1
/* 016600 8003B200 00741024 */ and $v0, $v1, $s4 /* 016600 8003B200 00741024 */ and $v0, $v1, $s4
/* 016604 8003B204 54400043 */ bnezl $v0, .L8003B314 /* 016604 8003B204 54400043 */ bnel $v0, $zero, .L8003B314
/* 016608 8003B208 26520001 */ addiu $s2, $s2, 1 /* 016608 8003B208 26520001 */ addiu $s2, $s2, 1
/* 01660C 8003B20C 00731024 */ and $v0, $v1, $s3 /* 01660C 8003B20C 00731024 */ and $v0, $v1, $s3
/* 016610 8003B210 14400010 */ bnez $v0, .L8003B254 /* 016610 8003B210 14400010 */ bnez $v0, .L8003B254
@ -3252,7 +3262,7 @@ func_8003B240:
/* 01664C 8003B24C 8E230000 */ lw $v1, ($s1) /* 01664C 8003B24C 8E230000 */ lw $v1, ($s1)
/* 016650 8003B250 00741024 */ and $v0, $v1, $s4 /* 016650 8003B250 00741024 */ and $v0, $v1, $s4
.L8003B254: .L8003B254:
/* 016654 8003B254 5440002F */ bnezl $v0, .L8003B314 /* 016654 8003B254 5440002F */ bnel $v0, $zero, .L8003B314
/* 016658 8003B258 26520001 */ addiu $s2, $s2, 1 /* 016658 8003B258 26520001 */ addiu $s2, $s2, 1
/* 01665C 8003B25C 00731024 */ and $v0, $v1, $s3 /* 01665C 8003B25C 00731024 */ and $v0, $v1, $s3
/* 016660 8003B260 1440001A */ bnez $v0, .L8003B2CC /* 016660 8003B260 1440001A */ bnez $v0, .L8003B2CC
@ -3287,10 +3297,10 @@ func_8003B240:
.L8003B2CC: .L8003B2CC:
/* 0166CC 8003B2CC 8E230000 */ lw $v1, ($s1) /* 0166CC 8003B2CC 8E230000 */ lw $v1, ($s1)
/* 0166D0 8003B2D0 00741024 */ and $v0, $v1, $s4 /* 0166D0 8003B2D0 00741024 */ and $v0, $v1, $s4
/* 0166D4 8003B2D4 5440000F */ bnezl $v0, .L8003B314 /* 0166D4 8003B2D4 5440000F */ bnel $v0, $zero, .L8003B314
/* 0166D8 8003B2D8 26520001 */ addiu $s2, $s2, 1 /* 0166D8 8003B2D8 26520001 */ addiu $s2, $s2, 1
/* 0166DC 8003B2DC 00731024 */ and $v0, $v1, $s3 /* 0166DC 8003B2DC 00731024 */ and $v0, $v1, $s3
/* 0166E0 8003B2E0 5440000C */ bnezl $v0, .L8003B314 /* 0166E0 8003B2E0 5440000C */ bnel $v0, $zero, .L8003B314
/* 0166E4 8003B2E4 26520001 */ addiu $s2, $s2, 1 /* 0166E4 8003B2E4 26520001 */ addiu $s2, $s2, 1
/* 0166E8 8003B2E8 0000802D */ daddu $s0, $zero, $zero /* 0166E8 8003B2E8 0000802D */ daddu $s0, $zero, $zero
/* 0166EC 8003B2EC 0220202D */ daddu $a0, $s1, $zero /* 0166EC 8003B2EC 0220202D */ daddu $a0, $s1, $zero
@ -3470,7 +3480,7 @@ func_8003B500:
/* 01692C 8003B52C 8C820000 */ lw $v0, ($a0) /* 01692C 8003B52C 8C820000 */ lw $v0, ($a0)
/* 016930 8003B530 3C034000 */ lui $v1, 0x4000 /* 016930 8003B530 3C034000 */ lui $v1, 0x4000
/* 016934 8003B534 00431024 */ and $v0, $v0, $v1 /* 016934 8003B534 00431024 */ and $v0, $v0, $v1
/* 016938 8003B538 54400016 */ bnezl $v0, .L8003B594 /* 016938 8003B538 54400016 */ bnel $v0, $zero, .L8003B594
/* 01693C 8003B53C AFA60010 */ sw $a2, 0x10($sp) /* 01693C 8003B53C AFA60010 */ sw $a2, 0x10($sp)
/* 016940 8003B540 908300AC */ lbu $v1, 0xac($a0) /* 016940 8003B540 908300AC */ lbu $v1, 0xac($a0)
/* 016944 8003B544 908200AD */ lbu $v0, 0xad($a0) /* 016944 8003B544 908200AD */ lbu $v0, 0xad($a0)
@ -4615,7 +4625,7 @@ func_8003C444:
func_8003C518: func_8003C518:
.L8003C518: .L8003C518:
/* 017918 8003C518 2A020002 */ slti $v0, $s0, 2 /* 017918 8003C518 2A020002 */ slti $v0, $s0, 2
/* 01791C 8003C51C 5440FFD3 */ bnezl $v0, .L8003C46C /* 01791C 8003C51C 5440FFD3 */ bnel $v0, $zero, .L8003C46C
/* 017920 8003C520 02301021 */ addu $v0, $s1, $s0 /* 017920 8003C520 02301021 */ addu $v0, $s1, $s0
/* 017924 8003C524 8FBF001C */ lw $ra, 0x1c($sp) /* 017924 8003C524 8FBF001C */ lw $ra, 0x1c($sp)
/* 017928 8003C528 8FB20018 */ lw $s2, 0x18($sp) /* 017928 8003C528 8FB20018 */ lw $s2, 0x18($sp)
@ -5412,10 +5422,10 @@ func_8003CFA8:
/* 018424 8003D024 50600018 */ beql $v1, $zero, .L8003D088 /* 018424 8003D024 50600018 */ beql $v1, $zero, .L8003D088
/* 018428 8003D028 26310001 */ addiu $s1, $s1, 1 /* 018428 8003D028 26310001 */ addiu $s1, $s1, 1
/* 01842C 8003D02C 00741024 */ and $v0, $v1, $s4 /* 01842C 8003D02C 00741024 */ and $v0, $v1, $s4
/* 018430 8003D030 54400015 */ bnezl $v0, .L8003D088 /* 018430 8003D030 54400015 */ bnel $v0, $zero, .L8003D088
/* 018434 8003D034 26310001 */ addiu $s1, $s1, 1 /* 018434 8003D034 26310001 */ addiu $s1, $s1, 1
/* 018438 8003D038 00731024 */ and $v0, $v1, $s3 /* 018438 8003D038 00731024 */ and $v0, $v1, $s3
/* 01843C 8003D03C 54400012 */ bnezl $v0, .L8003D088 /* 01843C 8003D03C 54400012 */ bnel $v0, $zero, .L8003D088
/* 018440 8003D040 26310001 */ addiu $s1, $s1, 1 /* 018440 8003D040 26310001 */ addiu $s1, $s1, 1
/* 018444 8003D044 C60C0038 */ lwc1 $f12, 0x38($s0) /* 018444 8003D044 C60C0038 */ lwc1 $f12, 0x38($s0)
/* 018448 8003D048 C60E0040 */ lwc1 $f14, 0x40($s0) /* 018448 8003D048 C60E0040 */ lwc1 $f14, 0x40($s0)
@ -5486,7 +5496,7 @@ func_8003CFA8:
/* 018540 8003D140 50400015 */ beql $v0, $zero, .L8003D198 /* 018540 8003D140 50400015 */ beql $v0, $zero, .L8003D198
/* 018544 8003D144 26310001 */ addiu $s1, $s1, 1 /* 018544 8003D144 26310001 */ addiu $s1, $s1, 1
/* 018548 8003D148 00731024 */ and $v0, $v1, $s3 /* 018548 8003D148 00731024 */ and $v0, $v1, $s3
/* 01854C 8003D14C 54400012 */ bnezl $v0, .L8003D198 /* 01854C 8003D14C 54400012 */ bnel $v0, $zero, .L8003D198
/* 018550 8003D150 26310001 */ addiu $s1, $s1, 1 /* 018550 8003D150 26310001 */ addiu $s1, $s1, 1
/* 018554 8003D154 C60C0038 */ lwc1 $f12, 0x38($s0) /* 018554 8003D154 C60C0038 */ lwc1 $f12, 0x38($s0)
/* 018558 8003D158 C60E0040 */ lwc1 $f14, 0x40($s0) /* 018558 8003D158 C60E0040 */ lwc1 $f14, 0x40($s0)
@ -5556,7 +5566,7 @@ func_8003D1D4:
/* 018648 8003D248 5060001F */ beql $v1, $zero, .L8003D2C8 /* 018648 8003D248 5060001F */ beql $v1, $zero, .L8003D2C8
/* 01864C 8003D24C 26310001 */ addiu $s1, $s1, 1 /* 01864C 8003D24C 26310001 */ addiu $s1, $s1, 1
/* 018650 8003D250 00741024 */ and $v0, $v1, $s4 /* 018650 8003D250 00741024 */ and $v0, $v1, $s4
/* 018654 8003D254 5440001C */ bnezl $v0, .L8003D2C8 /* 018654 8003D254 5440001C */ bnel $v0, $zero, .L8003D2C8
/* 018658 8003D258 26310001 */ addiu $s1, $s1, 1 /* 018658 8003D258 26310001 */ addiu $s1, $s1, 1
/* 01865C 8003D25C C602003C */ lwc1 $f2, 0x3c($s0) /* 01865C 8003D25C C602003C */ lwc1 $f2, 0x3c($s0)
/* 018660 8003D260 44930000 */ mtc1 $s3, $f0 /* 018660 8003D260 44930000 */ mtc1 $s3, $f0

32
papermario/asm/code_1a1f0_len_5390.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8003EDF0, "ax" .section .text8003EDF0, "ax"
@ -786,7 +796,7 @@ func_8003F8F4:
/* 01AD2C 8003F92C 00000000 */ nop /* 01AD2C 8003F92C 00000000 */ nop
/* 01AD30 8003F930 8E820000 */ lw $v0, ($s4) /* 01AD30 8003F930 8E820000 */ lw $v0, ($s4)
/* 01AD34 8003F934 30422000 */ andi $v0, $v0, 0x2000 /* 01AD34 8003F934 30422000 */ andi $v0, $v0, 0x2000
/* 01AD38 8003F938 5440004B */ bnezl $v0, .L8003FA68 /* 01AD38 8003F938 5440004B */ bnel $v0, $zero, .L8003FA68
/* 01AD3C 8003F93C 24020001 */ addiu $v0, $zero, 1 /* 01AD3C 8003F93C 24020001 */ addiu $v0, $zero, 1
/* 01AD40 8003F940 9262000A */ lbu $v0, 0xa($s3) /* 01AD40 8003F940 9262000A */ lbu $v0, 0xa($s3)
/* 01AD44 8003F944 00021600 */ sll $v0, $v0, 0x18 /* 01AD44 8003F944 00021600 */ sll $v0, $v0, 0x18
@ -911,7 +921,7 @@ func_8003FA68:
/* 01AEF8 8003FAF8 3C02800A */ lui $v0, 0x800a /* 01AEF8 8003FAF8 3C02800A */ lui $v0, 0x800a
/* 01AEFC 8003FAFC 8C42A650 */ lw $v0, -0x59b0($v0) /* 01AEFC 8003FAFC 8C42A650 */ lw $v0, -0x59b0($v0)
/* 01AF00 8003FB00 30420040 */ andi $v0, $v0, 0x40 /* 01AF00 8003FB00 30420040 */ andi $v0, $v0, 0x40
/* 01AF04 8003FB04 54400005 */ bnezl $v0, .L8003FB1C /* 01AF04 8003FB04 54400005 */ bnel $v0, $zero, .L8003FB1C
/* 01AF08 8003FB08 0000102D */ daddu $v0, $zero, $zero /* 01AF08 8003FB08 0000102D */ daddu $v0, $zero, $zero
/* 01AF0C 8003FB0C 2462FFFF */ addiu $v0, $v1, -1 /* 01AF0C 8003FB0C 2462FFFF */ addiu $v0, $v1, -1
/* 01AF10 8003FB10 A22200B4 */ sb $v0, 0xb4($s1) /* 01AF10 8003FB10 A22200B4 */ sb $v0, 0xb4($s1)
@ -1558,7 +1568,7 @@ func_8004004C:
/* 01B874 80040474 928300B4 */ lbu $v1, 0xb4($s4) /* 01B874 80040474 928300B4 */ lbu $v1, 0xb4($s4)
/* 01B878 80040478 2462FFF8 */ addiu $v0, $v1, -8 /* 01B878 80040478 2462FFF8 */ addiu $v0, $v1, -8
/* 01B87C 8004047C 2C420004 */ sltiu $v0, $v0, 4 /* 01B87C 8004047C 2C420004 */ sltiu $v0, $v0, 4
/* 01B880 80040480 54400010 */ bnezl $v0, .L800404C4 /* 01B880 80040480 54400010 */ bnel $v0, $zero, .L800404C4
/* 01B884 80040484 24100001 */ addiu $s0, $zero, 1 /* 01B884 80040484 24100001 */ addiu $s0, $zero, 1
/* 01B888 80040488 00031600 */ sll $v0, $v1, 0x18 /* 01B888 80040488 00031600 */ sll $v0, $v1, 0x18
/* 01B88C 8004048C 00021E03 */ sra $v1, $v0, 0x18 /* 01B88C 8004048C 00021E03 */ sra $v1, $v0, 0x18
@ -1749,7 +1759,7 @@ func_8004057C:
.L80040740: .L80040740:
/* 01BB40 80040740 0C03A752 */ jal is_ability_active /* 01BB40 80040740 0C03A752 */ jal is_ability_active
/* 01BB44 80040744 2404002D */ addiu $a0, $zero, 0x2d /* 01BB44 80040744 2404002D */ addiu $a0, $zero, 0x2d
/* 01BB48 80040748 54400001 */ bnezl $v0, .L80040750 /* 01BB48 80040748 54400001 */ bnel $v0, $zero, .L80040750
/* 01BB4C 8004074C 24100001 */ addiu $s0, $zero, 1 /* 01BB4C 8004074C 24100001 */ addiu $s0, $zero, 1
.L80040750: .L80040750:
/* 01BB50 80040750 8E820004 */ lw $v0, 4($s4) /* 01BB50 80040750 8E820004 */ lw $v0, 4($s4)
@ -1838,11 +1848,11 @@ func_8004057C:
/* 01BC90 80040890 8063F299 */ lb $v1, -0xd67($v1) /* 01BC90 80040890 8063F299 */ lb $v1, -0xd67($v1)
/* 01BC94 80040894 84420028 */ lh $v0, 0x28($v0) /* 01BC94 80040894 84420028 */ lh $v0, 0x28($v0)
/* 01BC98 80040898 0062182A */ slt $v1, $v1, $v0 /* 01BC98 80040898 0062182A */ slt $v1, $v1, $v0
/* 01BC9C 8004089C 54600015 */ bnezl $v1, .L800408F4 /* 01BC9C 8004089C 54600015 */ bnel $v1, $zero, .L800408F4
/* 01BCA0 800408A0 A2700004 */ sb $s0, 4($s3) /* 01BCA0 800408A0 A2700004 */ sb $s0, 4($s3)
/* 01BCA4 800408A4 8E220000 */ lw $v0, ($s1) /* 01BCA4 800408A4 8E220000 */ lw $v0, ($s1)
/* 01BCA8 800408A8 30420040 */ andi $v0, $v0, 0x40 /* 01BCA8 800408A8 30420040 */ andi $v0, $v0, 0x40
/* 01BCAC 800408AC 54400011 */ bnezl $v0, .L800408F4 /* 01BCAC 800408AC 54400011 */ bnel $v0, $zero, .L800408F4
/* 01BCB0 800408B0 A2700004 */ sb $s0, 4($s3) /* 01BCB0 800408B0 A2700004 */ sb $s0, 4($s3)
/* 01BCB4 800408B4 82620012 */ lb $v0, 0x12($s3) /* 01BCB4 800408B4 82620012 */ lb $v0, 0x12($s3)
/* 01BCB8 800408B8 50400001 */ beql $v0, $zero, .L800408C0 /* 01BCB8 800408B8 50400001 */ beql $v0, $zero, .L800408C0
@ -3907,10 +3917,10 @@ func_80042388:
/* 01D994 80042594 3C038007 */ lui $v1, 0x8007 /* 01D994 80042594 3C038007 */ lui $v1, 0x8007
/* 01D998 80042598 8C63419C */ lw $v1, 0x419c($v1) /* 01D998 80042598 8C63419C */ lw $v1, 0x419c($v1)
/* 01D99C 8004259C 80620040 */ lb $v0, 0x40($v1) /* 01D99C 8004259C 80620040 */ lb $v0, 0x40($v1)
/* 01D9A0 800425A0 54400004 */ bnezl $v0, .L800425B4 /* 01D9A0 800425A0 54400004 */ bnel $v0, $zero, .L800425B4
/* 01D9A4 800425A4 AEC00094 */ sw $zero, 0x94($s6) /* 01D9A4 800425A4 AEC00094 */ sw $zero, 0x94($s6)
/* 01D9A8 800425A8 80620044 */ lb $v0, 0x44($v1) /* 01D9A8 800425A8 80620044 */ lb $v0, 0x44($v1)
/* 01D9AC 800425AC 54400001 */ bnezl $v0, .L800425B4 /* 01D9AC 800425AC 54400001 */ bnel $v0, $zero, .L800425B4
/* 01D9B0 800425B0 AEC00094 */ sw $zero, 0x94($s6) /* 01D9B0 800425B0 AEC00094 */ sw $zero, 0x94($s6)
.L800425B4: .L800425B4:
/* 01D9B4 800425B4 8EC20094 */ lw $v0, 0x94($s6) /* 01D9B4 800425B4 8EC20094 */ lw $v0, 0x94($s6)
@ -4175,7 +4185,7 @@ func_80042388:
/* 01DD44 80042944 240400FF */ addiu $a0, $zero, 0xff /* 01DD44 80042944 240400FF */ addiu $a0, $zero, 0xff
/* 01DD48 80042948 3C02800A */ lui $v0, 0x800a /* 01DD48 80042948 3C02800A */ lui $v0, 0x800a
/* 01DD4C 8004294C 8042A63C */ lb $v0, -0x59c4($v0) /* 01DD4C 8004294C 8042A63C */ lb $v0, -0x59c4($v0)
/* 01DD50 80042950 54400003 */ bnezl $v0, .L80042960 /* 01DD50 80042950 54400003 */ bnel $v0, $zero, .L80042960
/* 01DD54 80042954 AEC00094 */ sw $zero, 0x94($s6) /* 01DD54 80042954 AEC00094 */ sw $zero, 0x94($s6)
/* 01DD58 80042958 2402000F */ addiu $v0, $zero, 0xf /* 01DD58 80042958 2402000F */ addiu $v0, $zero, 0xf
/* 01DD5C 8004295C AEC20094 */ sw $v0, 0x94($s6) /* 01DD5C 8004295C AEC20094 */ sw $v0, 0x94($s6)
@ -5398,7 +5408,7 @@ func_80043A44:
.L80043A44: .L80043A44:
/* 01EE44 80043A44 AFC00000 */ sw $zero, ($fp) /* 01EE44 80043A44 AFC00000 */ sw $zero, ($fp)
/* 01EE48 80043A48 8EA20000 */ lw $v0, ($s5) /* 01EE48 80043A48 8EA20000 */ lw $v0, ($s5)
/* 01EE4C 80043A4C 54400004 */ bnezl $v0, .L80043A60 /* 01EE4C 80043A4C 54400004 */ bnel $v0, $zero, .L80043A60
/* 01EE50 80043A50 AFC20004 */ sw $v0, 4($fp) /* 01EE50 80043A50 AFC20004 */ sw $v0, 4($fp)
/* 01EE54 80043A54 8E0200CC */ lw $v0, 0xcc($s0) /* 01EE54 80043A54 8E0200CC */ lw $v0, 0xcc($s0)
/* 01EE58 80043A58 8C420000 */ lw $v0, ($v0) /* 01EE58 80043A58 8C420000 */ lw $v0, ($v0)
@ -5659,7 +5669,7 @@ func_80043D30:
/* 01F1E4 80043DE4 00000000 */ nop /* 01F1E4 80043DE4 00000000 */ nop
/* 01F1E8 80043DE8 0C0B1059 */ jal does_script_exist /* 01F1E8 80043DE8 0C0B1059 */ jal does_script_exist
/* 01F1EC 80043DEC 8E040054 */ lw $a0, 0x54($s0) /* 01F1EC 80043DEC 8E040054 */ lw $a0, 0x54($s0)
/* 01F1F0 80043DF0 54400001 */ bnezl $v0, .L80043DF8 /* 01F1F0 80043DF0 54400001 */ bnel $v0, $zero, .L80043DF8
/* 01F1F4 80043DF4 24150001 */ addiu $s5, $zero, 1 /* 01F1F4 80043DF4 24150001 */ addiu $s5, $zero, 1
.L80043DF8: .L80043DF8:
/* 01F1F8 80043DF8 8E820000 */ lw $v0, ($s4) /* 01F1F8 80043DF8 8E820000 */ lw $v0, ($s4)

38
papermario/asm/code_1b40_len_20b0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80026740, "ax" .section .text80026740, "ax"
@ -20,7 +30,7 @@ step_game_loop:
/* 001B7C 8002677C 24420002 */ addiu $v0, $v0, 2 /* 001B7C 8002677C 24420002 */ addiu $v0, $v0, 2
/* 001B80 80026780 AE0202BC */ sw $v0, 0x2bc($s0) /* 001B80 80026780 AE0202BC */ sw $v0, 0x2bc($s0)
/* 001B84 80026784 0082102B */ sltu $v0, $a0, $v0 /* 001B84 80026784 0082102B */ sltu $v0, $a0, $v0
/* 001B88 80026788 54400001 */ bnezl $v0, .L80026790 /* 001B88 80026788 54400001 */ bnel $v0, $zero, .L80026790
/* 001B8C 8002678C AE0402BC */ sw $a0, 0x2bc($s0) /* 001B8C 8002678C AE0402BC */ sw $a0, 0x2bc($s0)
.L80026790: .L80026790:
/* 001B90 80026790 0C00A3E3 */ jal func_80028F8C /* 001B90 80026790 0C00A3E3 */ jal func_80028F8C
@ -416,7 +426,7 @@ gfx_draw_frame:
/* 002124 80026D24 00431023 */ subu $v0, $v0, $v1 /* 002124 80026D24 00431023 */ subu $v0, $v0, $v1
/* 002128 80026D28 000210C2 */ srl $v0, $v0, 3 /* 002128 80026D28 000210C2 */ srl $v0, $v0, 3
/* 00212C 80026D2C 28422080 */ slti $v0, $v0, 0x2080 /* 00212C 80026D2C 28422080 */ slti $v0, $v0, 0x2080
/* 002130 80026D30 54400003 */ bnezl $v0, .L80026D40 /* 002130 80026D30 54400003 */ bnel $v0, $zero, .L80026D40
/* 002134 80026D34 0000302D */ daddu $a2, $zero, $zero /* 002134 80026D34 0000302D */ daddu $a2, $zero, $zero
func_80026D38: func_80026D38:
/* 002138 80026D38 08009B4E */ j func_80026D38 /* 002138 80026D38 08009B4E */ j func_80026D38
@ -856,7 +866,7 @@ func_80027358:
.L80027384: .L80027384:
/* 002784 80027384 93A20000 */ lbu $v0, ($sp) /* 002784 80027384 93A20000 */ lbu $v0, ($sp)
/* 002788 80027388 00A2102A */ slt $v0, $a1, $v0 /* 002788 80027388 00A2102A */ slt $v0, $a1, $v0
/* 00278C 8002738C 54400001 */ bnezl $v0, .L80027394 /* 00278C 8002738C 54400001 */ bnel $v0, $zero, .L80027394
/* 002790 80027390 A3A50000 */ sb $a1, ($sp) /* 002790 80027390 A3A50000 */ sb $a1, ($sp)
.L80027394: .L80027394:
/* 002794 80027394 0000282D */ daddu $a1, $zero, $zero /* 002794 80027394 0000282D */ daddu $a1, $zero, $zero
@ -890,7 +900,7 @@ func_800273C4:
.L800273F0: .L800273F0:
/* 0027F0 800273F0 93A20001 */ lbu $v0, 1($sp) /* 0027F0 800273F0 93A20001 */ lbu $v0, 1($sp)
/* 0027F4 800273F4 00A2102A */ slt $v0, $a1, $v0 /* 0027F4 800273F4 00A2102A */ slt $v0, $a1, $v0
/* 0027F8 800273F8 54400001 */ bnezl $v0, .L80027400 /* 0027F8 800273F8 54400001 */ bnel $v0, $zero, .L80027400
/* 0027FC 800273FC A3A50001 */ sb $a1, 1($sp) /* 0027FC 800273FC A3A50001 */ sb $a1, 1($sp)
.L80027400: .L80027400:
/* 002800 80027400 0000282D */ daddu $a1, $zero, $zero /* 002800 80027400 0000282D */ daddu $a1, $zero, $zero
@ -924,7 +934,7 @@ func_80027430:
.L8002745C: .L8002745C:
/* 00285C 8002745C 93A20002 */ lbu $v0, 2($sp) /* 00285C 8002745C 93A20002 */ lbu $v0, 2($sp)
/* 002860 80027460 00A2102A */ slt $v0, $a1, $v0 /* 002860 80027460 00A2102A */ slt $v0, $a1, $v0
/* 002864 80027464 54400001 */ bnezl $v0, .L8002746C /* 002864 80027464 54400001 */ bnel $v0, $zero, .L8002746C
/* 002868 80027468 A3A50002 */ sb $a1, 2($sp) /* 002868 80027468 A3A50002 */ sb $a1, 2($sp)
.L8002746C: .L8002746C:
/* 00286C 8002746C 2405001F */ addiu $a1, $zero, 0x1f /* 00286C 8002746C 2405001F */ addiu $a1, $zero, 0x1f
@ -940,7 +950,7 @@ func_80027430:
.L80027490: .L80027490:
/* 002890 80027490 93A20008 */ lbu $v0, 8($sp) /* 002890 80027490 93A20008 */ lbu $v0, 8($sp)
/* 002894 80027494 0045102A */ slt $v0, $v0, $a1 /* 002894 80027494 0045102A */ slt $v0, $v0, $a1
/* 002898 80027498 54400001 */ bnezl $v0, .L800274A0 /* 002898 80027498 54400001 */ bnel $v0, $zero, .L800274A0
/* 00289C 8002749C A3A50008 */ sb $a1, 8($sp) /* 00289C 8002749C A3A50008 */ sb $a1, 8($sp)
.L800274A0: .L800274A0:
/* 0028A0 800274A0 2405001F */ addiu $a1, $zero, 0x1f /* 0028A0 800274A0 2405001F */ addiu $a1, $zero, 0x1f
@ -956,7 +966,7 @@ func_80027430:
.L800274C4: .L800274C4:
/* 0028C4 800274C4 93A20009 */ lbu $v0, 9($sp) /* 0028C4 800274C4 93A20009 */ lbu $v0, 9($sp)
/* 0028C8 800274C8 0045102A */ slt $v0, $v0, $a1 /* 0028C8 800274C8 0045102A */ slt $v0, $v0, $a1
/* 0028CC 800274CC 54400001 */ bnezl $v0, .L800274D4 /* 0028CC 800274CC 54400001 */ bnel $v0, $zero, .L800274D4
/* 0028D0 800274D0 A3A50009 */ sb $a1, 9($sp) /* 0028D0 800274D0 A3A50009 */ sb $a1, 9($sp)
.L800274D4: .L800274D4:
/* 0028D4 800274D4 2405001F */ addiu $a1, $zero, 0x1f /* 0028D4 800274D4 2405001F */ addiu $a1, $zero, 0x1f
@ -972,7 +982,7 @@ func_80027430:
.L800274F8: .L800274F8:
/* 0028F8 800274F8 93A2000A */ lbu $v0, 0xa($sp) /* 0028F8 800274F8 93A2000A */ lbu $v0, 0xa($sp)
/* 0028FC 800274FC 0045102A */ slt $v0, $v0, $a1 /* 0028FC 800274FC 0045102A */ slt $v0, $v0, $a1
/* 002900 80027500 54400001 */ bnezl $v0, .L80027508 /* 002900 80027500 54400001 */ bnel $v0, $zero, .L80027508
/* 002904 80027504 A3A5000A */ sb $a1, 0xa($sp) /* 002904 80027504 A3A5000A */ sb $a1, 0xa($sp)
.L80027508: .L80027508:
/* 002908 80027508 93A20008 */ lbu $v0, 8($sp) /* 002908 80027508 93A20008 */ lbu $v0, 8($sp)
@ -1173,13 +1183,13 @@ func_80027600:
/* 002BE0 800277E0 00021082 */ srl $v0, $v0, 2 /* 002BE0 800277E0 00021082 */ srl $v0, $v0, 2
/* 002BE4 800277E4 3042000F */ andi $v0, $v0, 0xf /* 002BE4 800277E4 3042000F */ andi $v0, $v0, 0xf
/* 002BE8 800277E8 2C420008 */ sltiu $v0, $v0, 8 /* 002BE8 800277E8 2C420008 */ sltiu $v0, $v0, 8
/* 002BEC 800277EC 5440000D */ bnezl $v0, .L80027824 /* 002BEC 800277EC 5440000D */ bnel $v0, $zero, .L80027824
/* 002BF0 800277F0 0280202D */ daddu $a0, $s4, $zero /* 002BF0 800277F0 0280202D */ daddu $a0, $s4, $zero
/* 002BF4 800277F4 94820000 */ lhu $v0, ($a0) /* 002BF4 800277F4 94820000 */ lhu $v0, ($a0)
/* 002BF8 800277F8 00021082 */ srl $v0, $v0, 2 /* 002BF8 800277F8 00021082 */ srl $v0, $v0, 2
/* 002BFC 800277FC 3042000F */ andi $v0, $v0, 0xf /* 002BFC 800277FC 3042000F */ andi $v0, $v0, 0xf
/* 002C00 80027800 2C420008 */ sltiu $v0, $v0, 8 /* 002C00 80027800 2C420008 */ sltiu $v0, $v0, 8
/* 002C04 80027804 54400007 */ bnezl $v0, .L80027824 /* 002C04 80027804 54400007 */ bnel $v0, $zero, .L80027824
/* 002C08 80027808 0280202D */ daddu $a0, $s4, $zero /* 002C08 80027808 0280202D */ daddu $a0, $s4, $zero
/* 002C0C 8002780C 94820002 */ lhu $v0, 2($a0) /* 002C0C 8002780C 94820002 */ lhu $v0, 2($a0)
/* 002C10 80027810 00021082 */ srl $v0, $v0, 2 /* 002C10 80027810 00021082 */ srl $v0, $v0, 2
@ -2027,24 +2037,24 @@ func_8002832C:
/* 0038C8 800284C8 8663000E */ lh $v1, 0xe($s3) /* 0038C8 800284C8 8663000E */ lh $v1, 0xe($s3)
/* 0038CC 800284CC 02229021 */ addu $s2, $s1, $v0 /* 0038CC 800284CC 02229021 */ addu $s2, $s1, $v0
/* 0038D0 800284D0 0203102A */ slt $v0, $s0, $v1 /* 0038D0 800284D0 0203102A */ slt $v0, $s0, $v1
/* 0038D4 800284D4 54400001 */ bnezl $v0, .L800284DC /* 0038D4 800284D4 54400001 */ bnel $v0, $zero, .L800284DC
/* 0038D8 800284D8 0060802D */ daddu $s0, $v1, $zero /* 0038D8 800284D8 0060802D */ daddu $s0, $v1, $zero
.L800284DC: .L800284DC:
/* 0038DC 800284DC 86640010 */ lh $a0, 0x10($s3) /* 0038DC 800284DC 86640010 */ lh $a0, 0x10($s3)
/* 0038E0 800284E0 0224102A */ slt $v0, $s1, $a0 /* 0038E0 800284E0 0224102A */ slt $v0, $s1, $a0
/* 0038E4 800284E4 54400001 */ bnezl $v0, .L800284EC /* 0038E4 800284E4 54400001 */ bnel $v0, $zero, .L800284EC
/* 0038E8 800284E8 0080882D */ daddu $s1, $a0, $zero /* 0038E8 800284E8 0080882D */ daddu $s1, $a0, $zero
.L800284EC: .L800284EC:
/* 0038EC 800284EC 8662000A */ lh $v0, 0xa($s3) /* 0038EC 800284EC 8662000A */ lh $v0, 0xa($s3)
/* 0038F0 800284F0 00621821 */ addu $v1, $v1, $v0 /* 0038F0 800284F0 00621821 */ addu $v1, $v1, $v0
/* 0038F4 800284F4 0074102A */ slt $v0, $v1, $s4 /* 0038F4 800284F4 0074102A */ slt $v0, $v1, $s4
/* 0038F8 800284F8 54400001 */ bnezl $v0, .L80028500 /* 0038F8 800284F8 54400001 */ bnel $v0, $zero, .L80028500
/* 0038FC 800284FC 0060A02D */ daddu $s4, $v1, $zero /* 0038FC 800284FC 0060A02D */ daddu $s4, $v1, $zero
.L80028500: .L80028500:
/* 003900 80028500 8662000C */ lh $v0, 0xc($s3) /* 003900 80028500 8662000C */ lh $v0, 0xc($s3)
/* 003904 80028504 00821821 */ addu $v1, $a0, $v0 /* 003904 80028504 00821821 */ addu $v1, $a0, $v0
/* 003908 80028508 0072102A */ slt $v0, $v1, $s2 /* 003908 80028508 0072102A */ slt $v0, $v1, $s2
/* 00390C 8002850C 54400001 */ bnezl $v0, .L80028514 /* 00390C 8002850C 54400001 */ bnel $v0, $zero, .L80028514
/* 003910 80028510 0060902D */ daddu $s2, $v1, $zero /* 003910 80028510 0060902D */ daddu $s2, $v1, $zero
.L80028514: .L80028514:
/* 003914 80028514 06020001 */ bltzl $s0, .L8002851C /* 003914 80028514 06020001 */ bltzl $s0, .L8002851C

14
papermario/asm/code_1f580_len_1940.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80044180, "ax" .section .text80044180, "ax"
@ -88,7 +98,7 @@ MakeNpcs:
/* 01F6A4 800442A4 AFBF0018 */ sw $ra, 0x18($sp) /* 01F6A4 800442A4 AFBF0018 */ sw $ra, 0x18($sp)
/* 01F6A8 800442A8 AFB00010 */ sw $s0, 0x10($sp) /* 01F6A8 800442A8 AFB00010 */ sw $s0, 0x10($sp)
/* 01F6AC 800442AC 8E30000C */ lw $s0, 0xc($s1) /* 01F6AC 800442AC 8E30000C */ lw $s0, 0xc($s1)
/* 01F6B0 800442B0 54A00001 */ bnezl $a1, .L800442B8 /* 01F6B0 800442B0 54A00001 */ bnel $a1, $zero, .L800442B8
/* 01F6B4 800442B4 AE200070 */ sw $zero, 0x70($s1) /* 01F6B4 800442B4 AE200070 */ sw $zero, 0x70($s1)
.L800442B8: .L800442B8:
/* 01F6B8 800442B8 8E240070 */ lw $a0, 0x70($s1) /* 01F6B8 800442B8 8E240070 */ lw $a0, 0x70($s1)
@ -806,7 +816,7 @@ RestartNpcAI:
/* 020070 80044C70 0040802D */ daddu $s0, $v0, $zero /* 020070 80044C70 0040802D */ daddu $s0, $v0, $zero
/* 020074 80044C74 8E020000 */ lw $v0, ($s0) /* 020074 80044C74 8E020000 */ lw $v0, ($s0)
/* 020078 80044C78 30420001 */ andi $v0, $v0, 1 /* 020078 80044C78 30420001 */ andi $v0, $v0, 1
/* 02007C 80044C7C 54400001 */ bnezl $v0, .L80044C84 /* 02007C 80044C7C 54400001 */ bnel $v0, $zero, .L80044C84
/* 020080 80044C80 2412000A */ addiu $s2, $zero, 0xa /* 020080 80044C80 2412000A */ addiu $s2, $zero, 0xa
.L80044C84: .L80044C84:
/* 020084 80044C84 8E02003C */ lw $v0, 0x3c($s0) /* 020084 80044C84 8E02003C */ lw $v0, 0x3c($s0)

44
papermario/asm/code_20ec0_len_5040.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80045AC0, "ax" .section .text80045AC0, "ax"
@ -230,7 +240,7 @@ func_80045D00:
/* 0211D0 80045DD0 8C42419C */ lw $v0, 0x419c($v0) /* 0211D0 80045DD0 8C42419C */ lw $v0, 0x419c($v0)
/* 0211D4 80045DD4 8C420010 */ lw $v0, 0x10($v0) /* 0211D4 80045DD4 8C420010 */ lw $v0, 0x10($v0)
/* 0211D8 80045DD8 3042C000 */ andi $v0, $v0, 0xc000 /* 0211D8 80045DD8 3042C000 */ andi $v0, $v0, 0xc000
/* 0211DC 80045DDC 54400001 */ bnezl $v0, .L80045DE4 /* 0211DC 80045DDC 54400001 */ bnel $v0, $zero, .L80045DE4
/* 0211E0 80045DE0 A6000014 */ sh $zero, 0x14($s0) /* 0211E0 80045DE0 A6000014 */ sh $zero, 0x14($s0)
.L80045DE4: .L80045DE4:
/* 0211E4 80045DE4 86020014 */ lh $v0, 0x14($s0) /* 0211E4 80045DE4 86020014 */ lh $v0, 0x14($s0)
@ -2934,11 +2944,11 @@ spawn_drops:
/* 02384C 8004844C 02A2A821 */ addu $s5, $s5, $v0 /* 02384C 8004844C 02A2A821 */ addu $s5, $s5, $v0
/* 023850 80048450 0C05152F */ jal get_global_flag /* 023850 80048450 0C05152F */ jal get_global_flag
/* 023854 80048454 24840714 */ addiu $a0, $a0, 0x714 /* 023854 80048454 24840714 */ addiu $a0, $a0, 0x714
/* 023858 80048458 54400007 */ bnezl $v0, .L80048478 /* 023858 80048458 54400007 */ bnel $v0, $zero, .L80048478
/* 02385C 8004845C 26940006 */ addiu $s4, $s4, 6 /* 02385C 8004845C 26940006 */ addiu $s4, $s4, 6
.L80048460: .L80048460:
/* 023860 80048460 02B1102A */ slt $v0, $s5, $s1 /* 023860 80048460 02B1102A */ slt $v0, $s5, $s1
/* 023864 80048464 54400004 */ bnezl $v0, .L80048478 /* 023864 80048464 54400004 */ bnel $v0, $zero, .L80048478
/* 023868 80048468 26940006 */ addiu $s4, $s4, 6 /* 023868 80048468 26940006 */ addiu $s4, $s4, 6
/* 02386C 8004846C 86100002 */ lh $s0, 2($s0) /* 02386C 8004846C 86100002 */ lh $s0, 2($s0)
/* 023870 80048470 08012123 */ j func_8004848C /* 023870 80048470 08012123 */ j func_8004848C
@ -3161,7 +3171,7 @@ func_80048700:
/* 023B94 80048794 8D020000 */ lw $v0, ($t0) /* 023B94 80048794 8D020000 */ lw $v0, ($t0)
/* 023B98 80048798 3C030080 */ lui $v1, 0x80 /* 023B98 80048798 3C030080 */ lui $v1, 0x80
/* 023B9C 8004879C 00431024 */ and $v0, $v0, $v1 /* 023B9C 8004879C 00431024 */ and $v0, $v0, $v1
/* 023BA0 800487A0 54400001 */ bnezl $v0, .L800487A8 /* 023BA0 800487A0 54400001 */ bnel $v0, $zero, .L800487A8
/* 023BA4 800487A4 0000882D */ daddu $s1, $zero, $zero /* 023BA4 800487A4 0000882D */ daddu $s1, $zero, $zero
.L800487A8: .L800487A8:
/* 023BA8 800487A8 12200002 */ beqz $s1, .L800487B4 /* 023BA8 800487A8 12200002 */ beqz $s1, .L800487B4
@ -3182,7 +3192,7 @@ func_80048700:
/* 023BDC 800487DC AFA80028 */ sw $t0, 0x28($sp) /* 023BDC 800487DC AFA80028 */ sw $t0, 0x28($sp)
/* 023BE0 800487E0 8FA8002C */ lw $t0, 0x2c($sp) /* 023BE0 800487E0 8FA8002C */ lw $t0, 0x2c($sp)
/* 023BE4 800487E4 0111102A */ slt $v0, $t0, $s1 /* 023BE4 800487E4 0111102A */ slt $v0, $t0, $s1
/* 023BE8 800487E8 54400002 */ bnezl $v0, .L800487F4 /* 023BE8 800487E8 54400002 */ bnel $v0, $zero, .L800487F4
/* 023BEC 800487EC 0100882D */ daddu $s1, $t0, $zero /* 023BEC 800487EC 0100882D */ daddu $s1, $t0, $zero
/* 023BF0 800487F0 8FA8002C */ lw $t0, 0x2c($sp) /* 023BF0 800487F0 8FA8002C */ lw $t0, 0x2c($sp)
.L800487F4: .L800487F4:
@ -3348,7 +3358,7 @@ func_800489B0:
/* 023E44 80048A44 8D020000 */ lw $v0, ($t0) /* 023E44 80048A44 8D020000 */ lw $v0, ($t0)
/* 023E48 80048A48 3C030080 */ lui $v1, 0x80 /* 023E48 80048A48 3C030080 */ lui $v1, 0x80
/* 023E4C 80048A4C 00431024 */ and $v0, $v0, $v1 /* 023E4C 80048A4C 00431024 */ and $v0, $v0, $v1
/* 023E50 80048A50 54400001 */ bnezl $v0, .L80048A58 /* 023E50 80048A50 54400001 */ bnel $v0, $zero, .L80048A58
/* 023E54 80048A54 0000882D */ daddu $s1, $zero, $zero /* 023E54 80048A54 0000882D */ daddu $s1, $zero, $zero
.L80048A58: .L80048A58:
/* 023E58 80048A58 12200002 */ beqz $s1, .L80048A64 /* 023E58 80048A58 12200002 */ beqz $s1, .L80048A64
@ -3369,7 +3379,7 @@ func_800489B0:
/* 023E8C 80048A8C AFA80028 */ sw $t0, 0x28($sp) /* 023E8C 80048A8C AFA80028 */ sw $t0, 0x28($sp)
/* 023E90 80048A90 8FA8002C */ lw $t0, 0x2c($sp) /* 023E90 80048A90 8FA8002C */ lw $t0, 0x2c($sp)
/* 023E94 80048A94 0111102A */ slt $v0, $t0, $s1 /* 023E94 80048A94 0111102A */ slt $v0, $t0, $s1
/* 023E98 80048A98 54400002 */ bnezl $v0, .L80048AA4 /* 023E98 80048A98 54400002 */ bnel $v0, $zero, .L80048AA4
/* 023E9C 80048A9C 0100882D */ daddu $s1, $t0, $zero /* 023E9C 80048A9C 0100882D */ daddu $s1, $t0, $zero
/* 023EA0 80048AA0 8FA8002C */ lw $t0, 0x2c($sp) /* 023EA0 80048AA0 8FA8002C */ lw $t0, 0x2c($sp)
.L80048AA4: .L80048AA4:
@ -3475,7 +3485,7 @@ func_80048BA8:
.L80048C00: .L80048C00:
/* 024000 80048C00 0C03A752 */ jal is_ability_active /* 024000 80048C00 0C03A752 */ jal is_ability_active
/* 024004 80048C04 24040010 */ addiu $a0, $zero, 0x10 /* 024004 80048C04 24040010 */ addiu $a0, $zero, 0x10
/* 024008 80048C08 54400001 */ bnezl $v0, .L80048C10 /* 024008 80048C08 54400001 */ bnel $v0, $zero, .L80048C10
/* 02400C 80048C0C 00118840 */ sll $s1, $s1, 1 /* 02400C 80048C0C 00118840 */ sll $s1, $s1, 1
.L80048C10: .L80048C10:
/* 024010 80048C10 2A220015 */ slti $v0, $s1, 0x15 /* 024010 80048C10 2A220015 */ slti $v0, $s1, 0x15
@ -3486,7 +3496,7 @@ func_80048BA8:
/* 024020 80048C20 8D020000 */ lw $v0, ($t0) /* 024020 80048C20 8D020000 */ lw $v0, ($t0)
/* 024024 80048C24 3C030080 */ lui $v1, 0x80 /* 024024 80048C24 3C030080 */ lui $v1, 0x80
/* 024028 80048C28 00431024 */ and $v0, $v0, $v1 /* 024028 80048C28 00431024 */ and $v0, $v0, $v1
/* 02402C 80048C2C 54400001 */ bnezl $v0, .L80048C34 /* 02402C 80048C2C 54400001 */ bnel $v0, $zero, .L80048C34
/* 024030 80048C30 0000882D */ daddu $s1, $zero, $zero /* 024030 80048C30 0000882D */ daddu $s1, $zero, $zero
.L80048C34: .L80048C34:
/* 024034 80048C34 8FA80028 */ lw $t0, 0x28($sp) /* 024034 80048C34 8FA80028 */ lw $t0, 0x28($sp)
@ -3499,7 +3509,7 @@ func_80048BA8:
.L80048C50: .L80048C50:
/* 024050 80048C50 8FA8002C */ lw $t0, 0x2c($sp) /* 024050 80048C50 8FA8002C */ lw $t0, 0x2c($sp)
/* 024054 80048C54 0111102A */ slt $v0, $t0, $s1 /* 024054 80048C54 0111102A */ slt $v0, $t0, $s1
/* 024058 80048C58 54400001 */ bnezl $v0, .L80048C60 /* 024058 80048C58 54400001 */ bnel $v0, $zero, .L80048C60
/* 02405C 80048C5C 0100882D */ daddu $s1, $t0, $zero /* 02405C 80048C5C 0100882D */ daddu $s1, $t0, $zero
.L80048C60: .L80048C60:
/* 024060 80048C60 1A200029 */ blez $s1, .L80048D08 /* 024060 80048C60 1A200029 */ blez $s1, .L80048D08
@ -3611,7 +3621,7 @@ get_coin_drop_amount:
.L80048DE0: .L80048DE0:
/* 0241E0 80048DE0 0C03A752 */ jal is_ability_active /* 0241E0 80048DE0 0C03A752 */ jal is_ability_active
/* 0241E4 80048DE4 24040010 */ addiu $a0, $zero, 0x10 /* 0241E4 80048DE4 24040010 */ addiu $a0, $zero, 0x10
/* 0241E8 80048DE8 54400001 */ bnezl $v0, .L80048DF0 /* 0241E8 80048DE8 54400001 */ bnel $v0, $zero, .L80048DF0
/* 0241EC 80048DEC 00108040 */ sll $s0, $s0, 1 /* 0241EC 80048DEC 00108040 */ sll $s0, $s0, 1
.L80048DF0: .L80048DF0:
/* 0241F0 80048DF0 8622000E */ lh $v0, 0xe($s1) /* 0241F0 80048DF0 8622000E */ lh $v0, 0xe($s1)
@ -3619,7 +3629,7 @@ get_coin_drop_amount:
/* 0241F8 80048DF8 8E420000 */ lw $v0, ($s2) /* 0241F8 80048DF8 8E420000 */ lw $v0, ($s2)
/* 0241FC 80048DFC 3C030084 */ lui $v1, 0x84 /* 0241FC 80048DFC 3C030084 */ lui $v1, 0x84
/* 024200 80048E00 00431024 */ and $v0, $v0, $v1 /* 024200 80048E00 00431024 */ and $v0, $v0, $v1
/* 024204 80048E04 54400001 */ bnezl $v0, .L80048E0C /* 024204 80048E04 54400001 */ bnel $v0, $zero, .L80048E0C
/* 024208 80048E08 0000802D */ daddu $s0, $zero, $zero /* 024208 80048E08 0000802D */ daddu $s0, $zero, $zero
.L80048E0C: .L80048E0C:
/* 02420C 80048E0C 2A020015 */ slti $v0, $s0, 0x15 /* 02420C 80048E0C 2A020015 */ slti $v0, $s0, 0x15
@ -4875,7 +4885,7 @@ func_80049F7C:
/* 025414 8004A014 45030001 */ bc1tl .L8004A01C /* 025414 8004A014 45030001 */ bc1tl .L8004A01C
/* 025418 8004A018 24110001 */ addiu $s1, $zero, 1 /* 025418 8004A018 24110001 */ addiu $s1, $zero, 1
.L8004A01C: .L8004A01C:
/* 02541C 8004A01C 56200031 */ bnezl $s1, .L8004A0E4 /* 02541C 8004A01C 56200031 */ bnel $s1, $zero, .L8004A0E4
/* 025420 8004A020 A600008E */ sh $zero, 0x8e($s0) /* 025420 8004A020 A600008E */ sh $zero, 0x8e($s0)
/* 025424 8004A024 C60C0038 */ lwc1 $f12, 0x38($s0) /* 025424 8004A024 C60C0038 */ lwc1 $f12, 0x38($s0)
/* 025428 8004A028 3C02800F */ lui $v0, 0x800f /* 025428 8004A028 3C02800F */ lui $v0, 0x800f
@ -5234,7 +5244,7 @@ DoBasicAI:
/* 025950 8004A550 AEA20028 */ sw $v0, 0x28($s5) /* 025950 8004A550 AEA20028 */ sw $v0, 0x28($s5)
/* 025954 8004A554 8E2200D0 */ lw $v0, 0xd0($s1) /* 025954 8004A554 8E2200D0 */ lw $v0, 0xd0($s1)
/* 025958 8004A558 8C420034 */ lw $v0, 0x34($v0) /* 025958 8004A558 8C420034 */ lw $v0, 0x34($v0)
/* 02595C 8004A55C 54400005 */ bnezl $v0, .L8004A574 /* 02595C 8004A55C 54400005 */ bnel $v0, $zero, .L8004A574
/* 025960 8004A560 2402FDFF */ addiu $v0, $zero, -0x201 /* 025960 8004A560 2402FDFF */ addiu $v0, $zero, -0x201
/* 025964 8004A564 34620200 */ ori $v0, $v1, 0x200 /* 025964 8004A564 34620200 */ ori $v0, $v1, 0x200
/* 025968 8004A568 2403FFF7 */ addiu $v1, $zero, -9 /* 025968 8004A568 2403FFF7 */ addiu $v1, $zero, -9
@ -5608,13 +5618,13 @@ func_8004AA8C:
/* 025E98 8004AA98 4600D306 */ mov.s $f12, $f26 /* 025E98 8004AA98 4600D306 */ mov.s $f12, $f26
/* 025E9C 8004AA9C E6200000 */ swc1 $f0, ($s1) /* 025E9C 8004AA9C E6200000 */ swc1 $f0, ($s1)
.L8004AAA0: .L8004AAA0:
/* 025EA0 8004AAA0 56600001 */ bnezl $s3, .L8004AAA8 /* 025EA0 8004AAA0 56600001 */ bnel $s3, $zero, .L8004AAA8
/* 025EA4 8004AAA4 E6760000 */ swc1 $f22, ($s3) /* 025EA4 8004AAA4 E6760000 */ swc1 $f22, ($s3)
.L8004AAA8: .L8004AAA8:
/* 025EA8 8004AAA8 56800001 */ bnezl $s4, .L8004AAB0 /* 025EA8 8004AAA8 56800001 */ bnel $s4, $zero, .L8004AAB0
/* 025EAC 8004AAAC E6940000 */ swc1 $f20, ($s4) /* 025EAC 8004AAAC E6940000 */ swc1 $f20, ($s4)
.L8004AAB0: .L8004AAB0:
/* 025EB0 8004AAB0 56A00001 */ bnezl $s5, .L8004AAB8 /* 025EB0 8004AAB0 56A00001 */ bnel $s5, $zero, .L8004AAB8
/* 025EB4 8004AAB4 E6B80000 */ swc1 $f24, ($s5) /* 025EB4 8004AAB4 E6B80000 */ swc1 $f24, ($s5)
.L8004AAB8: .L8004AAB8:
/* 025EB8 8004AAB8 0240102D */ daddu $v0, $s2, $zero /* 025EB8 8004AAB8 0240102D */ daddu $v0, $s2, $zero

12
papermario/asm/code_25f00_len_940.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8004AB00, "ax" .section .text8004AB00, "ax"
@ -638,7 +648,7 @@ alLink:
/* 0267F0 8004B3F0 AC850004 */ sw $a1, 4($a0) /* 0267F0 8004B3F0 AC850004 */ sw $a1, 4($a0)
/* 0267F4 8004B3F4 AC820000 */ sw $v0, ($a0) /* 0267F4 8004B3F4 AC820000 */ sw $v0, ($a0)
/* 0267F8 8004B3F8 8CA20000 */ lw $v0, ($a1) /* 0267F8 8004B3F8 8CA20000 */ lw $v0, ($a1)
/* 0267FC 8004B3FC 54400001 */ bnezl $v0, .L8004B404 /* 0267FC 8004B3FC 54400001 */ bnel $v0, $zero, .L8004B404
/* 026800 8004B400 AC440004 */ sw $a0, 4($v0) /* 026800 8004B400 AC440004 */ sw $a0, 4($v0)
.L8004B404: .L8004B404:
/* 026804 8004B404 03E00008 */ jr $ra /* 026804 8004B404 03E00008 */ jr $ra

44
papermario/asm/code_26840_len_20d0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8004B440, "ax" .section .text8004B440, "ax"
@ -499,7 +509,7 @@ func_8004BA74:
/* 026F04 8004BB04 0601FFFB */ bgez $s0, .L8004BAF4 /* 026F04 8004BB04 0601FFFB */ bgez $s0, .L8004BAF4
/* 026F08 8004BB08 2463FF54 */ addiu $v1, $v1, -0xac /* 026F08 8004BB08 2463FF54 */ addiu $v1, $v1, -0xac
func_8004BB0C: func_8004BB0C:
/* 026F0C 8004BB0C 55000038 */ bnezl $t0, .L8004BBF0 /* 026F0C 8004BB0C 55000038 */ bnel $t0, $zero, .L8004BBF0
/* 026F10 8004BB10 0280202D */ daddu $a0, $s4, $zero /* 026F10 8004BB10 0280202D */ daddu $a0, $s4, $zero
/* 026F14 8004BB14 24100007 */ addiu $s0, $zero, 7 /* 026F14 8004BB14 24100007 */ addiu $s0, $zero, 7
/* 026F18 8004BB18 24030620 */ addiu $v1, $zero, 0x620 /* 026F18 8004BB18 24030620 */ addiu $v1, $zero, 0x620
@ -558,7 +568,7 @@ func_8004BB94:
/* 026FB8 8004BBB8 0601FFFB */ bgez $s0, .L8004BBA8 /* 026FB8 8004BBB8 0601FFFB */ bgez $s0, .L8004BBA8
/* 026FBC 8004BBBC 2463FF54 */ addiu $v1, $v1, -0xac /* 026FBC 8004BBBC 2463FF54 */ addiu $v1, $v1, -0xac
func_8004BBC0: func_8004BBC0:
/* 026FC0 8004BBC0 5500000B */ bnezl $t0, .L8004BBF0 /* 026FC0 8004BBC0 5500000B */ bnel $t0, $zero, .L8004BBF0
/* 026FC4 8004BBC4 0280202D */ daddu $a0, $s4, $zero /* 026FC4 8004BBC4 0280202D */ daddu $a0, $s4, $zero
/* 026FC8 8004BBC8 24100007 */ addiu $s0, $zero, 7 /* 026FC8 8004BBC8 24100007 */ addiu $s0, $zero, 7
/* 026FCC 8004BBCC 24030620 */ addiu $v1, $zero, 0x620 /* 026FCC 8004BBCC 24030620 */ addiu $v1, $zero, 0x620
@ -629,7 +639,7 @@ func_8004BCA0:
.L8004BCA0: .L8004BCA0:
/* 0270A0 8004BCA0 1660001C */ bnez $s3, .L8004BD14 /* 0270A0 8004BCA0 1660001C */ bnez $s3, .L8004BD14
/* 0270A4 8004BCA4 00000000 */ nop /* 0270A4 8004BCA4 00000000 */ nop
/* 0270A8 8004BCA8 55000064 */ bnezl $t0, .L8004BE3C /* 0270A8 8004BCA8 55000064 */ bnel $t0, $zero, .L8004BE3C
/* 0270AC 8004BCAC 0280202D */ daddu $a0, $s4, $zero /* 0270AC 8004BCAC 0280202D */ daddu $a0, $s4, $zero
/* 0270B0 8004BCB0 30900007 */ andi $s0, $a0, 7 /* 0270B0 8004BCB0 30900007 */ andi $s0, $a0, 7
/* 0270B4 8004BCB4 00101040 */ sll $v0, $s0, 1 /* 0270B4 8004BCB4 00101040 */ sll $v0, $s0, 1
@ -664,7 +674,7 @@ func_8004BCA0:
/* 027110 8004BD10 24080001 */ addiu $t0, $zero, 1 /* 027110 8004BD10 24080001 */ addiu $t0, $zero, 1
.L8004BD14: .L8004BD14:
/* 027114 8004BD14 55000049 */ bnezl $t0, .L8004BE3C /* 027114 8004BD14 55000049 */ bnel $t0, $zero, .L8004BE3C
/* 027118 8004BD18 0280202D */ daddu $a0, $s4, $zero /* 027118 8004BD18 0280202D */ daddu $a0, $s4, $zero
/* 02711C 8004BD1C 30900007 */ andi $s0, $a0, 7 /* 02711C 8004BD1C 30900007 */ andi $s0, $a0, 7
/* 027120 8004BD20 0600000F */ bltz $s0, .L8004BD60 /* 027120 8004BD20 0600000F */ bltz $s0, .L8004BD60
@ -686,7 +696,7 @@ func_8004BCA0:
/* 02715C 8004BD5C 2463FF54 */ addiu $v1, $v1, -0xac /* 02715C 8004BD5C 2463FF54 */ addiu $v1, $v1, -0xac
func_8004BD60: func_8004BD60:
.L8004BD60: .L8004BD60:
/* 027160 8004BD60 55000036 */ bnezl $t0, .L8004BE3C /* 027160 8004BD60 55000036 */ bnel $t0, $zero, .L8004BE3C
/* 027164 8004BD64 0280202D */ daddu $a0, $s4, $zero /* 027164 8004BD64 0280202D */ daddu $a0, $s4, $zero
/* 027168 8004BD68 30900007 */ andi $s0, $a0, 7 /* 027168 8004BD68 30900007 */ andi $s0, $a0, 7
/* 02716C 8004BD6C 0600000E */ bltz $s0, .L8004BDA8 /* 02716C 8004BD6C 0600000E */ bltz $s0, .L8004BDA8
@ -707,7 +717,7 @@ func_8004BD60:
/* 0271A4 8004BDA4 2463FF54 */ addiu $v1, $v1, -0xac /* 0271A4 8004BDA4 2463FF54 */ addiu $v1, $v1, -0xac
func_8004BDA8: func_8004BDA8:
.L8004BDA8: .L8004BDA8:
/* 0271A8 8004BDA8 55000024 */ bnezl $t0, .L8004BE3C /* 0271A8 8004BDA8 55000024 */ bnel $t0, $zero, .L8004BE3C
/* 0271AC 8004BDAC 0280202D */ daddu $a0, $s4, $zero /* 0271AC 8004BDAC 0280202D */ daddu $a0, $s4, $zero
/* 0271B0 8004BDB0 30900007 */ andi $s0, $a0, 7 /* 0271B0 8004BDB0 30900007 */ andi $s0, $a0, 7
/* 0271B4 8004BDB4 0600000F */ bltz $s0, .L8004BDF4 /* 0271B4 8004BDB4 0600000F */ bltz $s0, .L8004BDF4
@ -729,7 +739,7 @@ func_8004BDA8:
/* 0271F0 8004BDF0 2463FF54 */ addiu $v1, $v1, -0xac /* 0271F0 8004BDF0 2463FF54 */ addiu $v1, $v1, -0xac
func_8004BDF4: func_8004BDF4:
.L8004BDF4: .L8004BDF4:
/* 0271F4 8004BDF4 55000011 */ bnezl $t0, .L8004BE3C /* 0271F4 8004BDF4 55000011 */ bnel $t0, $zero, .L8004BE3C
/* 0271F8 8004BDF8 0280202D */ daddu $a0, $s4, $zero /* 0271F8 8004BDF8 0280202D */ daddu $a0, $s4, $zero
/* 0271FC 8004BDFC 30900007 */ andi $s0, $a0, 7 /* 0271FC 8004BDFC 30900007 */ andi $s0, $a0, 7
/* 027200 8004BE00 00101040 */ sll $v0, $s0, 1 /* 027200 8004BE00 00101040 */ sll $v0, $s0, 1
@ -825,7 +835,7 @@ func_8004BF08:
/* 02732C 8004BF2C 10400013 */ beqz $v0, .L8004BF7C /* 02732C 8004BF2C 10400013 */ beqz $v0, .L8004BF7C
/* 027330 8004BF30 02933821 */ addu $a3, $s4, $s3 /* 027330 8004BF30 02933821 */ addu $a3, $s4, $s3
/* 027334 8004BF34 8CE20000 */ lw $v0, ($a3) /* 027334 8004BF34 8CE20000 */ lw $v0, ($a3)
/* 027338 8004BF38 5440000E */ bnezl $v0, .L8004BF74 /* 027338 8004BF38 5440000E */ bnel $v0, $zero, .L8004BF74
/* 02733C 8004BF3C 2673FF54 */ addiu $s3, $s3, -0xac /* 02733C 8004BF3C 2673FF54 */ addiu $s3, $s3, -0xac
/* 027340 8004BF40 0280202D */ daddu $a0, $s4, $zero /* 027340 8004BF40 0280202D */ daddu $a0, $s4, $zero
/* 027344 8004BF44 00E0282D */ daddu $a1, $a3, $zero /* 027344 8004BF44 00E0282D */ daddu $a1, $a3, $zero
@ -866,7 +876,7 @@ func_8004BF8C:
/* 0273B8 8004BFB8 2610FFFF */ addiu $s0, $s0, -1 /* 0273B8 8004BFB8 2610FFFF */ addiu $s0, $s0, -1
/* 0273BC 8004BFBC 90E20098 */ lbu $v0, 0x98($a3) /* 0273BC 8004BFBC 90E20098 */ lbu $v0, 0x98($a3)
/* 0273C0 8004BFC0 02A2102B */ sltu $v0, $s5, $v0 /* 0273C0 8004BFC0 02A2102B */ sltu $v0, $s5, $v0
/* 0273C4 8004BFC4 54400011 */ bnezl $v0, .L8004C00C /* 0273C4 8004BFC4 54400011 */ bnel $v0, $zero, .L8004C00C
/* 0273C8 8004BFC8 2610FFFF */ addiu $s0, $s0, -1 /* 0273C8 8004BFC8 2610FFFF */ addiu $s0, $s0, -1
/* 0273CC 8004BFCC 0280202D */ daddu $a0, $s4, $zero /* 0273CC 8004BFCC 0280202D */ daddu $a0, $s4, $zero
/* 0273D0 8004BFD0 00E0282D */ daddu $a1, $a3, $zero /* 0273D0 8004BFD0 00E0282D */ daddu $a1, $a3, $zero
@ -917,7 +927,7 @@ func_8004C000:
/* 027468 8004C068 0002AA02 */ srl $s5, $v0, 8 /* 027468 8004C068 0002AA02 */ srl $s5, $v0, 8
/* 02746C 8004C06C 90E20098 */ lbu $v0, 0x98($a3) /* 02746C 8004C06C 90E20098 */ lbu $v0, 0x98($a3)
/* 027470 8004C070 02A2102B */ sltu $v0, $s5, $v0 /* 027470 8004C070 02A2102B */ sltu $v0, $s5, $v0
/* 027474 8004C074 5440000B */ bnezl $v0, .L8004C0A4 /* 027474 8004C074 5440000B */ bnel $v0, $zero, .L8004C0A4
/* 027478 8004C078 26520004 */ addiu $s2, $s2, 4 /* 027478 8004C078 26520004 */ addiu $s2, $s2, 4
.L8004C07C: .L8004C07C:
/* 02747C 8004C07C 0280202D */ daddu $a0, $s4, $zero /* 02747C 8004C07C 0280202D */ daddu $a0, $s4, $zero
@ -1249,7 +1259,7 @@ func_8004C444:
/* 0278E4 8004C4E4 90C30045 */ lbu $v1, 0x45($a2) /* 0278E4 8004C4E4 90C30045 */ lbu $v1, 0x45($a2)
/* 0278E8 8004C4E8 920200BC */ lbu $v0, 0xbc($s0) /* 0278E8 8004C4E8 920200BC */ lbu $v0, 0xbc($s0)
/* 0278EC 8004C4EC 0043102B */ sltu $v0, $v0, $v1 /* 0278EC 8004C4EC 0043102B */ sltu $v0, $v0, $v1
/* 0278F0 8004C4F0 54400012 */ bnezl $v0, .L8004C53C /* 0278F0 8004C4F0 54400012 */ bnel $v0, $zero, .L8004C53C
/* 0278F4 8004C4F4 ACA00000 */ sw $zero, ($a1) /* 0278F4 8004C4F4 ACA00000 */ sw $zero, ($a1)
/* 0278F8 8004C4F8 A21100BF */ sb $s1, 0xbf($s0) /* 0278F8 8004C4F8 A21100BF */ sb $s1, 0xbf($s0)
/* 0278FC 8004C4FC 90A2009A */ lbu $v0, 0x9a($a1) /* 0278FC 8004C4FC 90A2009A */ lbu $v0, 0x9a($a1)
@ -1258,7 +1268,7 @@ func_8004C444:
/* 027908 8004C508 28620002 */ slti $v0, $v1, 2 /* 027908 8004C508 28620002 */ slti $v0, $v1, 2
/* 02790C 8004C50C 5040000E */ beql $v0, $zero, .L8004C548 /* 02790C 8004C50C 5040000E */ beql $v0, $zero, .L8004C548
/* 027910 8004C510 26310001 */ addiu $s1, $s1, 1 /* 027910 8004C510 26310001 */ addiu $s1, $s1, 1
/* 027914 8004C514 5460000C */ bnezl $v1, .L8004C548 /* 027914 8004C514 5460000C */ bnel $v1, $zero, .L8004C548
/* 027918 8004C518 26310001 */ addiu $s1, $s1, 1 /* 027918 8004C518 26310001 */ addiu $s1, $s1, 1
/* 02791C 8004C51C 0C01315E */ jal func_8004C578 /* 02791C 8004C51C 0C01315E */ jal func_8004C578
/* 027920 8004C520 0200202D */ daddu $a0, $s0, $zero /* 027920 8004C520 0200202D */ daddu $a0, $s0, $zero
@ -1440,7 +1450,7 @@ func_8004C764:
/* 027B80 8004C780 92230045 */ lbu $v1, 0x45($s1) /* 027B80 8004C780 92230045 */ lbu $v1, 0x45($s1)
/* 027B84 8004C784 924200BC */ lbu $v0, 0xbc($s2) /* 027B84 8004C784 924200BC */ lbu $v0, 0xbc($s2)
/* 027B88 8004C788 0043102B */ sltu $v0, $v0, $v1 /* 027B88 8004C788 0043102B */ sltu $v0, $v0, $v1
/* 027B8C 8004C78C 54400026 */ bnezl $v0, .L8004C828 /* 027B8C 8004C78C 54400026 */ bnel $v0, $zero, .L8004C828
/* 027B90 8004C790 A20000A9 */ sb $zero, 0xa9($s0) /* 027B90 8004C790 A20000A9 */ sb $zero, 0xa9($s0)
/* 027B94 8004C794 0220202D */ daddu $a0, $s1, $zero /* 027B94 8004C794 0220202D */ daddu $a0, $s1, $zero
/* 027B98 8004C798 0C014E22 */ jal func_80053888 /* 027B98 8004C798 0C014E22 */ jal func_80053888
@ -1450,7 +1460,7 @@ func_8004C764:
/* 027BA8 8004C7A8 14400004 */ bnez $v0, .L8004C7BC /* 027BA8 8004C7A8 14400004 */ bnez $v0, .L8004C7BC
/* 027BAC 8004C7AC 00000000 */ nop /* 027BAC 8004C7AC 00000000 */ nop
/* 027BB0 8004C7B0 920200A8 */ lbu $v0, 0xa8($s0) /* 027BB0 8004C7B0 920200A8 */ lbu $v0, 0xa8($s0)
/* 027BB4 8004C7B4 54400003 */ bnezl $v0, .L8004C7C4 /* 027BB4 8004C7B4 54400003 */ bnel $v0, $zero, .L8004C7C4
/* 027BB8 8004C7B8 A222000E */ sb $v0, 0xe($s1) /* 027BB8 8004C7B8 A222000E */ sb $v0, 0xe($s1)
.L8004C7BC: .L8004C7BC:
/* 027BBC 8004C7BC 9202009B */ lbu $v0, 0x9b($s0) /* 027BBC 8004C7BC 9202009B */ lbu $v0, 0x9b($s0)
@ -1682,7 +1692,7 @@ func_8004CAA0:
/* 027EC8 8004CAC8 14400004 */ bnez $v0, .L8004CADC /* 027EC8 8004CAC8 14400004 */ bnez $v0, .L8004CADC
/* 027ECC 8004CACC 00000000 */ nop /* 027ECC 8004CACC 00000000 */ nop
/* 027ED0 8004CAD0 920200A8 */ lbu $v0, 0xa8($s0) /* 027ED0 8004CAD0 920200A8 */ lbu $v0, 0xa8($s0)
/* 027ED4 8004CAD4 54400003 */ bnezl $v0, .L8004CAE4 /* 027ED4 8004CAD4 54400003 */ bnel $v0, $zero, .L8004CAE4
/* 027ED8 8004CAD8 A222000E */ sb $v0, 0xe($s1) /* 027ED8 8004CAD8 A222000E */ sb $v0, 0xe($s1)
.L8004CADC: .L8004CADC:
/* 027EDC 8004CADC 9202009B */ lbu $v0, 0x9b($s0) /* 027EDC 8004CADC 9202009B */ lbu $v0, 0x9b($s0)
@ -1695,7 +1705,7 @@ func_8004CAA0:
/* 027EF4 8004CAF4 0C013365 */ jal func_8004CD94 /* 027EF4 8004CAF4 0C013365 */ jal func_8004CD94
/* 027EF8 8004CAF8 A222000F */ sb $v0, 0xf($s1) /* 027EF8 8004CAF8 A222000F */ sb $v0, 0xf($s1)
/* 027EFC 8004CAFC 8E020018 */ lw $v0, 0x18($s0) /* 027EFC 8004CAFC 8E020018 */ lw $v0, 0x18($s0)
/* 027F00 8004CB00 54400003 */ bnezl $v0, .L8004CB10 /* 027F00 8004CB00 54400003 */ bnel $v0, $zero, .L8004CB10
/* 027F04 8004CB04 AE220014 */ sw $v0, 0x14($s1) /* 027F04 8004CB04 AE220014 */ sw $v0, 0x14($s1)
/* 027F08 8004CB08 8E020010 */ lw $v0, 0x10($s0) /* 027F08 8004CB08 8E020010 */ lw $v0, 0x10($s0)
/* 027F0C 8004CB0C AE220014 */ sw $v0, 0x14($s1) /* 027F0C 8004CB0C AE220014 */ sw $v0, 0x14($s1)
@ -1798,7 +1808,7 @@ func_8004CC34:
/* 028054 8004CC54 14400004 */ bnez $v0, .L8004CC68 /* 028054 8004CC54 14400004 */ bnez $v0, .L8004CC68
/* 028058 8004CC58 00000000 */ nop /* 028058 8004CC58 00000000 */ nop
/* 02805C 8004CC5C 920200A8 */ lbu $v0, 0xa8($s0) /* 02805C 8004CC5C 920200A8 */ lbu $v0, 0xa8($s0)
/* 028060 8004CC60 54400003 */ bnezl $v0, .L8004CC70 /* 028060 8004CC60 54400003 */ bnel $v0, $zero, .L8004CC70
/* 028064 8004CC64 A222000E */ sb $v0, 0xe($s1) /* 028064 8004CC64 A222000E */ sb $v0, 0xe($s1)
.L8004CC68: .L8004CC68:
/* 028068 8004CC68 9202009B */ lbu $v0, 0x9b($s0) /* 028068 8004CC68 9202009B */ lbu $v0, 0x9b($s0)

54
papermario/asm/code_28910_len_5090.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8004D510, "ax" .section .text8004D510, "ax"
@ -246,7 +256,7 @@ func_8004D7E0:
/* 028C48 8004D848 24052710 */ addiu $a1, $zero, 0x2710 /* 028C48 8004D848 24052710 */ addiu $a1, $zero, 0x2710
.L8004D84C: .L8004D84C:
/* 028C4C 8004D84C 54400001 */ bnezl $v0, .L8004D854 /* 028C4C 8004D84C 54400001 */ bnel $v0, $zero, .L8004D854
/* 028C50 8004D850 240500FA */ addiu $a1, $zero, 0xfa /* 028C50 8004D850 240500FA */ addiu $a1, $zero, 0xfa
func_8004D854: func_8004D854:
.L8004D854: .L8004D854:
@ -742,7 +752,7 @@ func_8004DE2C:
/* 0292E4 8004DEE4 24052710 */ addiu $a1, $zero, 0x2710 /* 0292E4 8004DEE4 24052710 */ addiu $a1, $zero, 0x2710
.L8004DEE8: .L8004DEE8:
/* 0292E8 8004DEE8 54400001 */ bnezl $v0, .L8004DEF0 /* 0292E8 8004DEE8 54400001 */ bnel $v0, $zero, .L8004DEF0
/* 0292EC 8004DEEC 240500FA */ addiu $a1, $zero, 0xfa /* 0292EC 8004DEEC 240500FA */ addiu $a1, $zero, 0xfa
func_8004DEF0: func_8004DEF0:
.L8004DEF0: .L8004DEF0:
@ -799,7 +809,7 @@ func_8004DF30:
/* 029390 8004DF90 16820008 */ bne $s4, $v0, .L8004DFB4 /* 029390 8004DF90 16820008 */ bne $s4, $v0, .L8004DFB4
/* 029394 8004DF94 0240102D */ daddu $v0, $s2, $zero /* 029394 8004DF94 0240102D */ daddu $v0, $s2, $zero
/* 029398 8004DF98 92020220 */ lbu $v0, 0x220($s0) /* 029398 8004DF98 92020220 */ lbu $v0, 0x220($s0)
/* 02939C 8004DF9C 54400004 */ bnezl $v0, .L8004DFB0 /* 02939C 8004DF9C 54400004 */ bnel $v0, $zero, .L8004DFB0
/* 0293A0 8004DFA0 A2000220 */ sb $zero, 0x220($s0) /* 0293A0 8004DFA0 A2000220 */ sb $zero, 0x220($s0)
/* 0293A4 8004DFA4 080137ED */ j func_8004DFB4 /* 0293A4 8004DFA4 080137ED */ j func_8004DFB4
/* 0293A8 8004DFA8 0240102D */ daddu $v0, $s2, $zero /* 0293A8 8004DFA8 0240102D */ daddu $v0, $s2, $zero
@ -1212,7 +1222,7 @@ func_8004E4B8:
/* 029944 8004E544 00400008 */ jr $v0 /* 029944 8004E544 00400008 */ jr $v0
/* 029948 8004E548 00000000 */ nop /* 029948 8004E548 00000000 */ nop
/* 02994C 8004E54C 92020220 */ lbu $v0, 0x220($s0) /* 02994C 8004E54C 92020220 */ lbu $v0, 0x220($s0)
/* 029950 8004E550 54400016 */ bnezl $v0, .L8004E5AC /* 029950 8004E550 54400016 */ bnel $v0, $zero, .L8004E5AC
/* 029954 8004E554 0000882D */ daddu $s1, $zero, $zero /* 029954 8004E554 0000882D */ daddu $s1, $zero, $zero
/* 029958 8004E558 0C013B1A */ jal func_8004EC68 /* 029958 8004E558 0C013B1A */ jal func_8004EC68
/* 02995C 8004E55C 0200202D */ daddu $a0, $s0, $zero /* 02995C 8004E55C 0200202D */ daddu $a0, $s0, $zero
@ -1468,7 +1478,7 @@ func_8004E880:
func_8004E8D0: func_8004E8D0:
/* 029CD0 8004E8D0 0065102B */ sltu $v0, $v1, $a1 /* 029CD0 8004E8D0 0065102B */ sltu $v0, $v1, $a1
.L8004E8D4: .L8004E8D4:
/* 029CD4 8004E8D4 54400001 */ bnezl $v0, .L8004E8DC /* 029CD4 8004E8D4 54400001 */ bnel $v0, $zero, .L8004E8DC
/* 029CD8 8004E8D8 0060282D */ daddu $a1, $v1, $zero /* 029CD8 8004E8D8 0060282D */ daddu $a1, $v1, $zero
.L8004E8DC: .L8004E8DC:
/* 029CDC 8004E8DC 3C021062 */ lui $v0, 0x1062 /* 029CDC 8004E8DC 3C021062 */ lui $v0, 0x1062
@ -1599,7 +1609,7 @@ func_8004EA34:
/* 029E6C 8004EA6C 2442FFFF */ addiu $v0, $v0, -1 /* 029E6C 8004EA6C 2442FFFF */ addiu $v0, $v0, -1
/* 029E70 8004EA70 A0A20168 */ sb $v0, 0x168($a1) /* 029E70 8004EA70 A0A20168 */ sb $v0, 0x168($a1)
/* 029E74 8004EA74 304200FF */ andi $v0, $v0, 0xff /* 029E74 8004EA74 304200FF */ andi $v0, $v0, 0xff
/* 029E78 8004EA78 54400011 */ bnezl $v0, .L8004EAC0 /* 029E78 8004EA78 54400011 */ bnel $v0, $zero, .L8004EAC0
/* 029E7C 8004EA7C 00081080 */ sll $v0, $t0, 2 /* 029E7C 8004EA7C 00081080 */ sll $v0, $t0, 2
/* 029E80 8004EA80 10600012 */ beqz $v1, .L8004EACC /* 029E80 8004EA80 10600012 */ beqz $v1, .L8004EACC
/* 029E84 8004EA84 ACC00158 */ sw $zero, 0x158($a2) /* 029E84 8004EA84 ACC00158 */ sw $zero, 0x158($a2)
@ -1651,7 +1661,7 @@ func_8004EAD4:
/* 029F0C 8004EB0C 10400034 */ beqz $v0, .L8004EBE0 /* 029F0C 8004EB0C 10400034 */ beqz $v0, .L8004EBE0
/* 029F10 8004EB10 ACC20000 */ sw $v0, ($a2) /* 029F10 8004EB10 ACC20000 */ sw $v0, ($a2)
/* 029F14 8004EB14 30620100 */ andi $v0, $v1, 0x100 /* 029F14 8004EB14 30620100 */ andi $v0, $v1, 0x100
/* 029F18 8004EB18 54400031 */ bnezl $v0, .L8004EBE0 /* 029F18 8004EB18 54400031 */ bnel $v0, $zero, .L8004EBE0
/* 029F1C 8004EB1C ACC00000 */ sw $zero, ($a2) /* 029F1C 8004EB1C ACC00000 */ sw $zero, ($a2)
/* 029F20 8004EB20 3062E000 */ andi $v0, $v1, 0xe000 /* 029F20 8004EB20 3062E000 */ andi $v0, $v1, 0xe000
/* 029F24 8004EB24 00021342 */ srl $v0, $v0, 0xd /* 029F24 8004EB24 00021342 */ srl $v0, $v0, 0xd
@ -1685,7 +1695,7 @@ func_8004EAD4:
/* 029F94 8004EB94 00431021 */ addu $v0, $v0, $v1 /* 029F94 8004EB94 00431021 */ addu $v0, $v0, $v1
/* 029F98 8004EB98 ACC20000 */ sw $v0, ($a2) /* 029F98 8004EB98 ACC20000 */ sw $v0, ($a2)
/* 029F9C 8004EB9C 90820233 */ lbu $v0, 0x233($a0) /* 029F9C 8004EB9C 90820233 */ lbu $v0, 0x233($a0)
/* 029FA0 8004EBA0 54400001 */ bnezl $v0, .L8004EBA8 /* 029FA0 8004EBA0 54400001 */ bnel $v0, $zero, .L8004EBA8
/* 029FA4 8004EBA4 A0CC005A */ sb $t4, 0x5a($a2) /* 029FA4 8004EBA4 A0CC005A */ sb $t4, 0x5a($a2)
.L8004EBA8: .L8004EBA8:
/* 029FA8 8004EBA8 08013AF8 */ j func_8004EBE0 /* 029FA8 8004EBA8 08013AF8 */ j func_8004EBE0
@ -1971,7 +1981,7 @@ func_8004EECC:
/* 02A35C 8004EF5C A3AB0028 */ sb $t3, 0x28($sp) /* 02A35C 8004EF5C A3AB0028 */ sb $t3, 0x28($sp)
.L8004EF60: .L8004EF60:
/* 02A360 8004EF60 5440022D */ bnezl $v0, .L8004F818 /* 02A360 8004EF60 5440022D */ bnel $v0, $zero, .L8004F818
/* 02A364 8004EF64 AE030028 */ sw $v1, 0x28($s0) /* 02A364 8004EF64 AE030028 */ sw $v1, 0x28($s0)
/* 02A368 8004EF68 8E020000 */ lw $v0, ($s0) /* 02A368 8004EF68 8E020000 */ lw $v0, ($s0)
/* 02A36C 8004EF6C 90430000 */ lbu $v1, ($v0) /* 02A36C 8004EF6C 90430000 */ lbu $v1, ($v0)
@ -2189,7 +2199,7 @@ func_8004F208:
/* 02A660 8004F260 2442085C */ addiu $v0, $v0, 0x85c /* 02A660 8004F260 2442085C */ addiu $v0, $v0, 0x85c
/* 02A664 8004F264 02822021 */ addu $a0, $s4, $v0 /* 02A664 8004F264 02822021 */ addu $a0, $s4, $v0
/* 02A668 8004F268 90820017 */ lbu $v0, 0x17($a0) /* 02A668 8004F268 90820017 */ lbu $v0, 0x17($a0)
/* 02A66C 8004F26C 5440000B */ bnezl $v0, .L8004F29C /* 02A66C 8004F26C 5440000B */ bnel $v0, $zero, .L8004F29C
/* 02A670 8004F270 24A50001 */ addiu $a1, $a1, 1 /* 02A670 8004F270 24A50001 */ addiu $a1, $a1, 1
/* 02A674 8004F274 8C83000C */ lw $v1, 0xc($a0) /* 02A674 8004F274 8C83000C */ lw $v1, 0xc($a0)
/* 02A678 8004F278 0067102A */ slt $v0, $v1, $a3 /* 02A678 8004F278 0067102A */ slt $v0, $v1, $a3
@ -2605,7 +2615,7 @@ func_8004F824:
.L8004F82C: .L8004F82C:
/* 02AC2C 8004F82C 9202005A */ lbu $v0, 0x5a($s0) /* 02AC2C 8004F82C 9202005A */ lbu $v0, 0x5a($s0)
/* 02AC30 8004F830 544000C9 */ bnezl $v0, .L8004FB58 /* 02AC30 8004F830 544000C9 */ bnel $v0, $zero, .L8004FB58
/* 02AC34 8004F834 26B50001 */ addiu $s5, $s5, 1 /* 02AC34 8004F834 26B50001 */ addiu $s5, $s5, 1
/* 02AC38 8004F838 000410C0 */ sll $v0, $a0, 3 /* 02AC38 8004F838 000410C0 */ sll $v0, $a0, 3
/* 02AC3C 8004F83C 00441021 */ addu $v0, $v0, $a0 /* 02AC3C 8004F83C 00441021 */ addu $v0, $v0, $a0
@ -2623,7 +2633,7 @@ func_8004F824:
/* 02AC6C 8004F86C 2442085C */ addiu $v0, $v0, 0x85c /* 02AC6C 8004F86C 2442085C */ addiu $v0, $v0, 0x85c
/* 02AC70 8004F870 02829821 */ addu $s3, $s4, $v0 /* 02AC70 8004F870 02829821 */ addu $s3, $s4, $v0
/* 02AC74 8004F874 92620017 */ lbu $v0, 0x17($s3) /* 02AC74 8004F874 92620017 */ lbu $v0, 0x17($s3)
/* 02AC78 8004F878 544000B6 */ bnezl $v0, .L8004FB54 /* 02AC78 8004F878 544000B6 */ bnel $v0, $zero, .L8004FB54
/* 02AC7C 8004F87C A2600017 */ sb $zero, 0x17($s3) /* 02AC7C 8004F87C A2600017 */ sb $zero, 0x17($s3)
/* 02AC80 8004F880 8E62000C */ lw $v0, 0xc($s3) /* 02AC80 8004F880 8E62000C */ lw $v0, 0xc($s3)
/* 02AC84 8004F884 18400006 */ blez $v0, .L8004F8A0 /* 02AC84 8004F884 18400006 */ blez $v0, .L8004F8A0
@ -2932,7 +2942,7 @@ func_8004FC9C:
/* 02B0B4 8004FCB4 908200D4 */ lbu $v0, 0xd4($a0) /* 02B0B4 8004FCB4 908200D4 */ lbu $v0, 0xd4($a0)
/* 02B0B8 8004FCB8 3042007F */ andi $v0, $v0, 0x7f /* 02B0B8 8004FCB8 3042007F */ andi $v0, $v0, 0x7f
/* 02B0BC 8004FCBC 54400001 */ bnezl $v0, .L8004FCC4 /* 02B0BC 8004FCBC 54400001 */ bnel $v0, $zero, .L8004FCC4
/* 02B0C0 8004FCC0 00021600 */ sll $v0, $v0, 0x18 /* 02B0C0 8004FCC0 00021600 */ sll $v0, $v0, 0x18
.L8004FCC4: .L8004FCC4:
/* 02B0C4 8004FCC4 AC8200C0 */ sw $v0, 0xc0($a0) /* 02B0C4 8004FCC4 AC8200C0 */ sw $v0, 0xc0($a0)
@ -3032,7 +3042,7 @@ func_8004FD38:
/* 02B210 8004FE10 908200D6 */ lbu $v0, 0xd6($a0) /* 02B210 8004FE10 908200D6 */ lbu $v0, 0xd6($a0)
/* 02B214 8004FE14 948500D4 */ lhu $a1, 0xd4($a0) /* 02B214 8004FE14 948500D4 */ lhu $a1, 0xd4($a0)
/* 02B218 8004FE18 3046007F */ andi $a2, $v0, 0x7f /* 02B218 8004FE18 3046007F */ andi $a2, $v0, 0x7f
/* 02B21C 8004FE1C 54C00001 */ bnezl $a2, .L8004FE24 /* 02B21C 8004FE1C 54C00001 */ bnel $a2, $zero, .L8004FE24
/* 02B220 8004FE20 00063600 */ sll $a2, $a2, 0x18 /* 02B220 8004FE20 00063600 */ sll $a2, $a2, 0x18
.L8004FE24: .L8004FE24:
/* 02B224 8004FE24 58A00001 */ blezl $a1, .L8004FE2C /* 02B224 8004FE24 58A00001 */ blezl $a1, .L8004FE2C
@ -3078,7 +3088,7 @@ func_8004FD38:
func_8004FEB0: func_8004FEB0:
/* 02B2B0 8004FEB0 908200D4 */ lbu $v0, 0xd4($a0) /* 02B2B0 8004FEB0 908200D4 */ lbu $v0, 0xd4($a0)
/* 02B2B4 8004FEB4 3042007F */ andi $v0, $v0, 0x7f /* 02B2B4 8004FEB4 3042007F */ andi $v0, $v0, 0x7f
/* 02B2B8 8004FEB8 54400001 */ bnezl $v0, .L8004FEC0 /* 02B2B8 8004FEB8 54400001 */ bnel $v0, $zero, .L8004FEC0
/* 02B2BC 8004FEBC 00021600 */ sll $v0, $v0, 0x18 /* 02B2BC 8004FEBC 00021600 */ sll $v0, $v0, 0x18
.L8004FEC0: .L8004FEC0:
/* 02B2C0 8004FEC0 ACA20018 */ sw $v0, 0x18($a1) /* 02B2C0 8004FEC0 ACA20018 */ sw $v0, 0x18($a1)
@ -3090,7 +3100,7 @@ func_8004FED0:
/* 02B2D0 8004FED0 908200D6 */ lbu $v0, 0xd6($a0) /* 02B2D0 8004FED0 908200D6 */ lbu $v0, 0xd6($a0)
/* 02B2D4 8004FED4 948600D4 */ lhu $a2, 0xd4($a0) /* 02B2D4 8004FED4 948600D4 */ lhu $a2, 0xd4($a0)
/* 02B2D8 8004FED8 3044007F */ andi $a0, $v0, 0x7f /* 02B2D8 8004FED8 3044007F */ andi $a0, $v0, 0x7f
/* 02B2DC 8004FEDC 54800001 */ bnezl $a0, .L8004FEE4 /* 02B2DC 8004FEDC 54800001 */ bnel $a0, $zero, .L8004FEE4
/* 02B2E0 8004FEE0 00042600 */ sll $a0, $a0, 0x18 /* 02B2E0 8004FEE0 00042600 */ sll $a0, $a0, 0x18
.L8004FEE4: .L8004FEE4:
/* 02B2E4 8004FEE4 8CA20018 */ lw $v0, 0x18($a1) /* 02B2E4 8004FEE4 8CA20018 */ lw $v0, 0x18($a1)
@ -3509,7 +3519,7 @@ func_8005043C:
/* 02B8A0 800504A0 08014151 */ j func_80050544 /* 02B8A0 800504A0 08014151 */ j func_80050544
/* 02B8A4 800504A4 00000000 */ nop /* 02B8A4 800504A4 00000000 */ nop
/* 02B8A8 800504A8 54600025 */ bnezl $v1, .L80050540 /* 02B8A8 800504A8 54600025 */ bnel $v1, $zero, .L80050540
/* 02B8AC 800504AC A0A3004F */ sb $v1, 0x4f($a1) /* 02B8AC 800504AC A0A3004F */ sb $v1, 0x4f($a1)
/* 02B8B0 800504B0 90A2004E */ lbu $v0, 0x4e($a1) /* 02B8B0 800504B0 90A2004E */ lbu $v0, 0x4e($a1)
/* 02B8B4 800504B4 10400023 */ beqz $v0, .L80050544 /* 02B8B4 800504B4 10400023 */ beqz $v0, .L80050544
@ -3780,7 +3790,7 @@ func_80050818:
/* 02BC28 80050828 240504B0 */ addiu $a1, $zero, 0x4b0 /* 02BC28 80050828 240504B0 */ addiu $a1, $zero, 0x4b0
.L8005082C: .L8005082C:
/* 02BC2C 8005082C 54400001 */ bnezl $v0, .L80050834 /* 02BC2C 8005082C 54400001 */ bnel $v0, $zero, .L80050834
/* 02BC30 80050830 2405F6A0 */ addiu $a1, $zero, -0x960 /* 02BC30 80050830 2405F6A0 */ addiu $a1, $zero, -0x960
func_80050834: func_80050834:
.L80050834: .L80050834:
@ -3966,7 +3976,7 @@ func_80050970:
.L80050A98: .L80050A98:
/* 02BE98 80050A98 9242005A */ lbu $v0, 0x5a($s2) /* 02BE98 80050A98 9242005A */ lbu $v0, 0x5a($s2)
/* 02BE9C 80050A9C 54400026 */ bnezl $v0, .L80050B38 /* 02BE9C 80050A9C 54400026 */ bnel $v0, $zero, .L80050B38
/* 02BEA0 80050AA0 26B50001 */ addiu $s5, $s5, 1 /* 02BEA0 80050AA0 26B50001 */ addiu $s5, $s5, 1
/* 02BEA4 80050AA4 A25E005A */ sb $fp, 0x5a($s2) /* 02BEA4 80050AA4 A25E005A */ sb $fp, 0x5a($s2)
/* 02BEA8 80050AA8 A260005A */ sb $zero, 0x5a($s3) /* 02BEA8 80050AA8 A260005A */ sb $zero, 0x5a($s3)
@ -4143,7 +4153,7 @@ func_80050CA0:
/* 02C0EC 80050CEC 10A00010 */ beqz $a1, .L80050D30 /* 02C0EC 80050CEC 10A00010 */ beqz $a1, .L80050D30
/* 02C0F0 80050CF0 00838021 */ addu $s0, $a0, $v1 /* 02C0F0 80050CF0 00838021 */ addu $s0, $a0, $v1
/* 02C0F4 80050CF4 8E020020 */ lw $v0, 0x20($s0) /* 02C0F4 80050CF4 8E020020 */ lw $v0, 0x20($s0)
/* 02C0F8 80050CF8 5440000E */ bnezl $v0, .L80050D34 /* 02C0F8 80050CF8 5440000E */ bnel $v0, $zero, .L80050D34
/* 02C0FC 80050CFC 24110001 */ addiu $s1, $zero, 1 /* 02C0FC 80050CFC 24110001 */ addiu $s1, $zero, 1
/* 02C100 80050D00 0C014429 */ jal func_800510A4 /* 02C100 80050D00 0C014429 */ jal func_800510A4
/* 02C104 80050D04 00000000 */ nop /* 02C104 80050D04 00000000 */ nop
@ -4952,7 +4962,7 @@ func_800516D0:
/* 02CBF0 800517F0 320300FF */ andi $v1, $s0, 0xff /* 02CBF0 800517F0 320300FF */ andi $v1, $s0, 0xff
/* 02CBF4 800517F4 1060FF49 */ beqz $v1, .L8005151C /* 02CBF4 800517F4 1060FF49 */ beqz $v1, .L8005151C
/* 02CBF8 800517F8 2C620078 */ sltiu $v0, $v1, 0x78 /* 02CBF8 800517F8 2C620078 */ sltiu $v0, $v1, 0x78
/* 02CBFC 800517FC 5440022C */ bnezl $v0, .L800520B0 /* 02CBFC 800517FC 5440022C */ bnel $v0, $zero, .L800520B0
/* 02CC00 80051800 AEA30018 */ sw $v1, 0x18($s5) /* 02CC00 80051800 AEA30018 */ sw $v1, 0x18($s5)
/* 02CC04 80051804 0C014874 */ jal func_800521D0 /* 02CC04 80051804 0C014874 */ jal func_800521D0
/* 02CC08 80051808 02A0202D */ daddu $a0, $s5, $zero /* 02CC08 80051808 02A0202D */ daddu $a0, $s5, $zero
@ -5138,7 +5148,7 @@ func_80051A3C:
/* 02CE7C 80051A7C 01038821 */ addu $s1, $t0, $v1 /* 02CE7C 80051A7C 01038821 */ addu $s1, $t0, $v1
/* 02CE80 80051A80 92220045 */ lbu $v0, 0x45($s1) /* 02CE80 80051A80 92220045 */ lbu $v0, 0x45($s1)
/* 02CE84 80051A84 0045102B */ sltu $v0, $v0, $a1 /* 02CE84 80051A84 0045102B */ sltu $v0, $v0, $a1
/* 02CE88 80051A88 5440FFBA */ bnezl $v0, .L80051974 /* 02CE88 80051A88 5440FFBA */ bnel $v0, $zero, .L80051974
/* 02CE8C 80051A8C 0220202D */ daddu $a0, $s1, $zero /* 02CE8C 80051A8C 0220202D */ daddu $a0, $s1, $zero
/* 02CE90 80051A90 26100001 */ addiu $s0, $s0, 1 /* 02CE90 80051A90 26100001 */ addiu $s0, $s0, 1
/* 02CE94 80051A94 0204102B */ sltu $v0, $s0, $a0 /* 02CE94 80051A94 0204102B */ sltu $v0, $s0, $a0

10
papermario/asm/code_2d9a0_len_890.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text800525A0, "ax" .section .text800525A0, "ax"

16
papermario/asm/code_2e230_len_2190.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80052E30, "ax" .section .text80052E30, "ax"
@ -278,7 +288,7 @@ func_80052E5C:
/* 02E650 80053250 94440004 */ lhu $a0, 4($v0) /* 02E650 80053250 94440004 */ lhu $a0, 4($v0)
/* 02E654 80053254 0C01511F */ jal al_CopyFileTableEntry /* 02E654 80053254 0C01511F */ jal al_CopyFileTableEntry
/* 02E658 80053258 27A60018 */ addiu $a2, $sp, 0x18 /* 02E658 80053258 27A60018 */ addiu $a2, $sp, 0x18
/* 02E65C 8005325C 54400005 */ bnezl $v0, .L80053274 /* 02E65C 8005325C 54400005 */ bnel $v0, $zero, .L80053274
/* 02E660 80053260 0000202D */ daddu $a0, $zero, $zero /* 02E660 80053260 0000202D */ daddu $a0, $zero, $zero
/* 02E664 80053264 8FA50018 */ lw $a1, 0x18($sp) /* 02E664 80053264 8FA50018 */ lw $a1, 0x18($sp)
/* 02E668 80053268 0C01516D */ jal al_LoadPRG /* 02E668 80053268 0C01516D */ jal al_LoadPRG
@ -1869,7 +1879,7 @@ al_LoadBank:
/* 02FC3C 8005483C 2402000B */ addiu $v0, $zero, 0xb /* 02FC3C 8005483C 2402000B */ addiu $v0, $zero, 0xb
/* 02FC40 80054840 1062000A */ beq $v1, $v0, .L8005486C /* 02FC40 80054840 1062000A */ beq $v1, $v0, .L8005486C
/* 02FC44 80054844 2862000C */ slti $v0, $v1, 0xc /* 02FC44 80054844 2862000C */ slti $v0, $v1, 0xc
/* 02FC48 80054848 5440005B */ bnezl $v0, .L800549B8 /* 02FC48 80054848 5440005B */ bnel $v0, $zero, .L800549B8
/* 02FC4C 8005484C 0000902D */ daddu $s2, $zero, $zero /* 02FC4C 8005484C 0000902D */ daddu $s2, $zero, $zero
/* 02FC50 80054850 24020015 */ addiu $v0, $zero, 0x15 /* 02FC50 80054850 24020015 */ addiu $v0, $zero, 0x15
/* 02FC54 80054854 1062000E */ beq $v1, $v0, .L80054890 /* 02FC54 80054854 1062000E */ beq $v1, $v0, .L80054890
@ -2077,7 +2087,7 @@ func_800549F8:
.L80054AFC: .L80054AFC:
/* 02FEFC 80054AFC 1222000A */ beq $s1, $v0, .L80054B28 /* 02FEFC 80054AFC 1222000A */ beq $s1, $v0, .L80054B28
/* 02FF00 80054B00 2E22000C */ sltiu $v0, $s1, 0xc /* 02FF00 80054B00 2E22000C */ sltiu $v0, $s1, 0xc
/* 02FF04 80054B04 54400042 */ bnezl $v0, .L80054C10 /* 02FF04 80054B04 54400042 */ bnel $v0, $zero, .L80054C10
/* 02FF08 80054B08 0000902D */ daddu $s2, $zero, $zero /* 02FF08 80054B08 0000902D */ daddu $s2, $zero, $zero
/* 02FF0C 80054B0C 24020015 */ addiu $v0, $zero, 0x15 /* 02FF0C 80054B0C 24020015 */ addiu $v0, $zero, 0x15
/* 02FF10 80054B10 12220015 */ beq $s1, $v0, .L80054B68 /* 02FF10 80054B10 12220015 */ beq $s1, $v0, .L80054B68

24
papermario/asm/code_303c0_len_3e10.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80054FC0, "ax" .section .text80054FC0, "ax"
@ -218,7 +228,7 @@ func_80055240:
/* 030698 80055298 24070960 */ addiu $a3, $zero, 0x960 /* 030698 80055298 24070960 */ addiu $a3, $zero, 0x960
.L8005529C: .L8005529C:
/* 03069C 8005529C 54400001 */ bnezl $v0, .L800552A4 /* 03069C 8005529C 54400001 */ bnel $v0, $zero, .L800552A4
/* 0306A0 800552A0 2407F6A0 */ addiu $a3, $zero, -0x960 /* 0306A0 800552A0 2407F6A0 */ addiu $a3, $zero, -0x960
func_800552A4: func_800552A4:
.L800552A4: .L800552A4:
@ -289,7 +299,7 @@ func_80055330:
/* 030788 80055388 24070960 */ addiu $a3, $zero, 0x960 /* 030788 80055388 24070960 */ addiu $a3, $zero, 0x960
.L8005538C: .L8005538C:
/* 03078C 8005538C 54400001 */ bnezl $v0, .L80055394 /* 03078C 8005538C 54400001 */ bnel $v0, $zero, .L80055394
/* 030790 80055390 2407F6A0 */ addiu $a3, $zero, -0x960 /* 030790 80055390 2407F6A0 */ addiu $a3, $zero, -0x960
func_80055394: func_80055394:
.L80055394: .L80055394:
@ -1611,7 +1621,7 @@ func_80056250:
/* 0319A4 800565A4 3C038008 */ lui $v1, 0x8008 /* 0319A4 800565A4 3C038008 */ lui $v1, 0x8008
/* 0319A8 800565A8 24638E50 */ addiu $v1, $v1, -0x71b0 /* 0319A8 800565A8 24638E50 */ addiu $v1, $v1, -0x71b0
/* 0319AC 800565AC 8C620000 */ lw $v0, ($v1) /* 0319AC 800565AC 8C620000 */ lw $v0, ($v1)
/* 0319B0 800565B0 54400001 */ bnezl $v0, .L800565B8 /* 0319B0 800565B0 54400001 */ bnel $v0, $zero, .L800565B8
/* 0319B4 800565B4 AC600000 */ sw $zero, ($v1) /* 0319B4 800565B4 AC600000 */ sw $zero, ($v1)
.L800565B8: .L800565B8:
/* 0319B8 800565B8 03E00008 */ jr $ra /* 0319B8 800565B8 03E00008 */ jr $ra
@ -3273,7 +3283,7 @@ func_80057CFC:
/* 033148 80057D48 3C028008 */ lui $v0, 0x8008 /* 033148 80057D48 3C028008 */ lui $v0, 0x8008
/* 03314C 80057D4C 24428181 */ addiu $v0, $v0, -0x7e7f /* 03314C 80057D4C 24428181 */ addiu $v0, $v0, -0x7e7f
/* 033150 80057D50 90420000 */ lbu $v0, ($v0) /* 033150 80057D50 90420000 */ lbu $v0, ($v0)
/* 033154 80057D54 54400008 */ bnezl $v0, .L80057D78 /* 033154 80057D54 54400008 */ bnel $v0, $zero, .L80057D78
/* 033158 80057D58 2402007F */ addiu $v0, $zero, 0x7f /* 033158 80057D58 2402007F */ addiu $v0, $zero, 0x7f
/* 03315C 80057D5C 84E3004E */ lh $v1, 0x4e($a3) /* 03315C 80057D5C 84E3004E */ lh $v1, 0x4e($a3)
/* 033160 80057D60 3C028008 */ lui $v0, 0x8008 /* 033160 80057D60 3C028008 */ lui $v0, 0x8008
@ -3771,7 +3781,7 @@ func_80058404:
/* 033820 80058420 00029900 */ sll $s3, $v0, 4 /* 033820 80058420 00029900 */ sll $s3, $v0, 4
/* 033824 80058424 02151821 */ addu $v1, $s0, $s5 /* 033824 80058424 02151821 */ addu $v1, $s0, $s5
/* 033828 80058428 0073102A */ slt $v0, $v1, $s3 /* 033828 80058428 0073102A */ slt $v0, $v1, $s3
/* 03382C 8005842C 54400001 */ bnezl $v0, .L80058434 /* 03382C 8005842C 54400001 */ bnel $v0, $zero, .L80058434
/* 033830 80058430 0060982D */ daddu $s3, $v1, $zero /* 033830 80058430 0060982D */ daddu $s3, $v1, $zero
.L80058434: .L80058434:
/* 033834 80058434 3262000F */ andi $v0, $s3, 0xf /* 033834 80058434 3262000F */ andi $v0, $s3, 0xf
@ -4003,7 +4013,7 @@ func_80058684:
/* 033B58 80058758 0000882D */ daddu $s1, $zero, $zero /* 033B58 80058758 0000882D */ daddu $s1, $zero, $zero
.L8005875C: .L8005875C:
/* 033B5C 8005875C 0211102A */ slt $v0, $s0, $s1 /* 033B5C 8005875C 0211102A */ slt $v0, $s0, $s1
/* 033B60 80058760 54400001 */ bnezl $v0, .L80058768 /* 033B60 80058760 54400001 */ bnel $v0, $zero, .L80058768
/* 033B64 80058764 0200882D */ daddu $s1, $s0, $zero /* 033B64 80058764 0200882D */ daddu $s1, $s0, $zero
.L80058768: .L80058768:
/* 033B68 80058768 0230102A */ slt $v0, $s1, $s0 /* 033B68 80058768 0230102A */ slt $v0, $s1, $s0
@ -4222,7 +4232,7 @@ func_80058A6C:
/* 033E88 80058A88 244200B8 */ addiu $v0, $v0, 0xb8 /* 033E88 80058A88 244200B8 */ addiu $v0, $v0, 0xb8
/* 033E8C 80058A8C AEE2001C */ sw $v0, 0x1c($s7) /* 033E8C 80058A8C AEE2001C */ sw $v0, 0x1c($s7)
/* 033E90 80058A90 0062102A */ slt $v0, $v1, $v0 /* 033E90 80058A90 0062102A */ slt $v0, $v1, $v0
/* 033E94 80058A94 54400001 */ bnezl $v0, .L80058A9C /* 033E94 80058A94 54400001 */ bnel $v0, $zero, .L80058A9C
/* 033E98 80058A98 AEE3001C */ sw $v1, 0x1c($s7) /* 033E98 80058A98 AEE3001C */ sw $v1, 0x1c($s7)
.L80058A9C: .L80058A9C:
/* 033E9C 80058A9C 8EE20028 */ lw $v0, 0x28($s7) /* 033E9C 80058A9C 8EE20028 */ lw $v0, 0x28($s7)

20
papermario/asm/code_341d0_len_20d0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80058DD0, "ax" .section .text80058DD0, "ax"
@ -1139,7 +1149,7 @@ func_80059D50:
.L80059E24: .L80059E24:
/* 035224 80059E24 8E020000 */ lw $v0, ($s0) /* 035224 80059E24 8E020000 */ lw $v0, ($s0)
/* 035228 80059E28 30420004 */ andi $v0, $v0, 4 /* 035228 80059E28 30420004 */ andi $v0, $v0, 4
/* 03522C 80059E2C 54400009 */ bnezl $v0, .L80059E54 /* 03522C 80059E2C 54400009 */ bnel $v0, $zero, .L80059E54
/* 035230 80059E30 26520001 */ addiu $s2, $s2, 1 /* 035230 80059E30 26520001 */ addiu $s2, $s2, 1
func_80059E34: func_80059E34:
/* 035234 80059E34 8E020010 */ lw $v0, 0x10($s0) /* 035234 80059E34 8E020010 */ lw $v0, 0x10($s0)
@ -1229,7 +1239,7 @@ render_effects:
/* 035358 80059F58 00000000 */ nop /* 035358 80059F58 00000000 */ nop
.L80059F5C: .L80059F5C:
/* 03535C 80059F5C 54400005 */ bnezl $v0, .L80059F74 /* 03535C 80059F5C 54400005 */ bnel $v0, $zero, .L80059F74
/* 035360 80059F60 26310001 */ addiu $s1, $s1, 1 /* 035360 80059F60 26310001 */ addiu $s1, $s1, 1
func_80059F64: func_80059F64:
/* 035364 80059F64 8C820010 */ lw $v0, 0x10($a0) /* 035364 80059F64 8C820010 */ lw $v0, 0x10($a0)
@ -1291,7 +1301,7 @@ func_80059F94:
/* 035434 8005A034 00000000 */ nop /* 035434 8005A034 00000000 */ nop
.L8005A038: .L8005A038:
/* 035438 8005A038 54400093 */ bnezl $v0, .L8005A288 /* 035438 8005A038 54400093 */ bnel $v0, $zero, .L8005A288
/* 03543C 8005A03C 26520001 */ addiu $s2, $s2, 1 /* 03543C 8005A03C 26520001 */ addiu $s2, $s2, 1
func_8005A040: func_8005A040:
/* 035440 8005A040 8DC20010 */ lw $v0, 0x10($t6) /* 035440 8005A040 8DC20010 */ lw $v0, 0x10($t6)
@ -1443,7 +1453,7 @@ func_8005A040:
/* 035684 8005A284 26520001 */ addiu $s2, $s2, 1 /* 035684 8005A284 26520001 */ addiu $s2, $s2, 1
.L8005A288: .L8005A288:
/* 035688 8005A288 2A420060 */ slti $v0, $s2, 0x60 /* 035688 8005A288 2A420060 */ slti $v0, $s2, 0x60
/* 03568C 8005A28C 5440FF55 */ bnezl $v0, .L80059FE4 /* 03568C 8005A28C 5440FF55 */ bnel $v0, $zero, .L80059FE4
/* 035690 8005A290 00121080 */ sll $v0, $s2, 2 /* 035690 8005A290 00121080 */ sll $v0, $s2, 2
/* 035694 8005A294 8FBF0028 */ lw $ra, 0x28($sp) /* 035694 8005A294 8FBF0028 */ lw $ra, 0x28($sp)
/* 035698 8005A298 8FB50024 */ lw $s5, 0x24($sp) /* 035698 8005A298 8FB50024 */ lw $s5, 0x24($sp)
@ -2156,7 +2166,7 @@ get_map_IDs_by_name:
/* 036064 8005AC64 8E240000 */ lw $a0, ($s1) /* 036064 8005AC64 8E240000 */ lw $a0, ($s1)
/* 036068 8005AC68 0C01BB5C */ jal strcmp /* 036068 8005AC68 0C01BB5C */ jal strcmp
/* 03606C 8005AC6C 02A0282D */ daddu $a1, $s5, $zero /* 03606C 8005AC6C 02A0282D */ daddu $a1, $s5, $zero
/* 036070 8005AC70 54400005 */ bnezl $v0, .L8005AC88 /* 036070 8005AC70 54400005 */ bnel $v0, $zero, .L8005AC88
/* 036074 8005AC74 26100001 */ addiu $s0, $s0, 1 /* 036074 8005AC74 26100001 */ addiu $s0, $s0, 1
/* 036078 8005AC78 24020001 */ addiu $v0, $zero, 1 /* 036078 8005AC78 24020001 */ addiu $v0, $zero, 1
/* 03607C 8005AC7C A6D40000 */ sh $s4, ($s6) /* 03607C 8005AC7C A6D40000 */ sh $s4, ($s6)

24
papermario/asm/code_362a0_len_2f70.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8005AEA0, "ax" .section .text8005AEA0, "ax"
@ -2175,7 +2185,7 @@ func_8005CE68:
/* 03827C 8005CE7C 00569021 */ addu $s2, $v0, $s6 /* 03827C 8005CE7C 00569021 */ addu $s2, $v0, $s6
/* 038280 8005CE80 8E420000 */ lw $v0, ($s2) /* 038280 8005CE80 8E420000 */ lw $v0, ($s2)
/* 038284 8005CE84 00571024 */ and $v0, $v0, $s7 /* 038284 8005CE84 00571024 */ and $v0, $v0, $s7
/* 038288 8005CE88 54400071 */ bnezl $v0, .L8005D050 /* 038288 8005CE88 54400071 */ bnel $v0, $zero, .L8005D050
/* 03828C 8005CE8C 26D6001C */ addiu $s6, $s6, 0x1c /* 03828C 8005CE8C 26D6001C */ addiu $s6, $s6, 0x1c
/* 038290 8005CE90 8643000A */ lh $v1, 0xa($s2) /* 038290 8005CE90 8643000A */ lh $v1, 0xa($s2)
/* 038294 8005CE94 5060006E */ beql $v1, $zero, .L8005D050 /* 038294 8005CE94 5060006E */ beql $v1, $zero, .L8005D050
@ -2242,7 +2252,7 @@ func_8005CE68:
/* 038384 8005CF84 8EA50000 */ lw $a1, ($s5) /* 038384 8005CF84 8EA50000 */ lw $a1, ($s5)
/* 038388 8005CF88 0C017127 */ jal test_down_ray_triangle /* 038388 8005CF88 0C017127 */ jal test_down_ray_triangle
/* 03838C 8005CF8C 26310040 */ addiu $s1, $s1, 0x40 /* 03838C 8005CF8C 26310040 */ addiu $s1, $s1, 0x40
/* 038390 8005CF90 54400001 */ bnezl $v0, .L8005CF98 /* 038390 8005CF90 54400001 */ bnel $v0, $zero, .L8005CF98
/* 038394 8005CF94 0260A02D */ daddu $s4, $s3, $zero /* 038394 8005CF94 0260A02D */ daddu $s4, $s3, $zero
.L8005CF98: .L8005CF98:
/* 038398 8005CF98 8642000A */ lh $v0, 0xa($s2) /* 038398 8005CF98 8642000A */ lh $v0, 0xa($s2)
@ -2270,7 +2280,7 @@ func_8005CE68:
/* 0383E4 8005CFE4 8EA50000 */ lw $a1, ($s5) /* 0383E4 8005CFE4 8EA50000 */ lw $a1, ($s5)
/* 0383E8 8005CFE8 0C0171E9 */ jal test_up_ray_triangle /* 0383E8 8005CFE8 0C0171E9 */ jal test_up_ray_triangle
/* 0383EC 8005CFEC 26310040 */ addiu $s1, $s1, 0x40 /* 0383EC 8005CFEC 26310040 */ addiu $s1, $s1, 0x40
/* 0383F0 8005CFF0 54400001 */ bnezl $v0, .L8005CFF8 /* 0383F0 8005CFF0 54400001 */ bnel $v0, $zero, .L8005CFF8
/* 0383F4 8005CFF4 0260A02D */ daddu $s4, $s3, $zero /* 0383F4 8005CFF4 0260A02D */ daddu $s4, $s3, $zero
.L8005CFF8: .L8005CFF8:
/* 0383F8 8005CFF8 8642000A */ lh $v0, 0xa($s2) /* 0383F8 8005CFF8 8642000A */ lh $v0, 0xa($s2)
@ -2290,7 +2300,7 @@ func_8005CE68:
/* 038424 8005D024 8EA50000 */ lw $a1, ($s5) /* 038424 8005D024 8EA50000 */ lw $a1, ($s5)
/* 038428 8005D028 0C016FA1 */ jal test_ray_triangle_general /* 038428 8005D028 0C016FA1 */ jal test_ray_triangle_general
/* 03842C 8005D02C 26310040 */ addiu $s1, $s1, 0x40 /* 03842C 8005D02C 26310040 */ addiu $s1, $s1, 0x40
/* 038430 8005D030 54400001 */ bnezl $v0, .L8005D038 /* 038430 8005D030 54400001 */ bnel $v0, $zero, .L8005D038
/* 038434 8005D034 0260A02D */ daddu $s4, $s3, $zero /* 038434 8005D034 0260A02D */ daddu $s4, $s3, $zero
.L8005D038: .L8005D038:
/* 038438 8005D038 8642000A */ lh $v0, 0xa($s2) /* 038438 8005D038 8642000A */ lh $v0, 0xa($s2)
@ -2417,7 +2427,7 @@ test_ray_zones:
/* 0385F8 8005D1F8 8EA50000 */ lw $a1, ($s5) /* 0385F8 8005D1F8 8EA50000 */ lw $a1, ($s5)
/* 0385FC 8005D1FC 0C017127 */ jal test_down_ray_triangle /* 0385FC 8005D1FC 0C017127 */ jal test_down_ray_triangle
/* 038600 8005D200 26310040 */ addiu $s1, $s1, 0x40 /* 038600 8005D200 26310040 */ addiu $s1, $s1, 0x40
/* 038604 8005D204 54400001 */ bnezl $v0, .L8005D20C /* 038604 8005D204 54400001 */ bnel $v0, $zero, .L8005D20C
/* 038608 8005D208 0260B02D */ daddu $s6, $s3, $zero /* 038608 8005D208 0260B02D */ daddu $s6, $s3, $zero
.L8005D20C: .L8005D20C:
/* 03860C 8005D20C 8642000A */ lh $v0, 0xa($s2) /* 03860C 8005D20C 8642000A */ lh $v0, 0xa($s2)
@ -2652,7 +2662,7 @@ func_8005D51C:
/* 038960 8005D560 8E220000 */ lw $v0, ($s1) /* 038960 8005D560 8E220000 */ lw $v0, ($s1)
/* 038964 8005D564 34630020 */ ori $v1, $v1, 0x20 /* 038964 8005D564 34630020 */ ori $v1, $v1, 0x20
/* 038968 8005D568 00431024 */ and $v0, $v0, $v1 /* 038968 8005D568 00431024 */ and $v0, $v0, $v1
/* 03896C 8005D56C 5440014E */ bnezl $v0, .L8005DAA8 /* 03896C 8005D56C 5440014E */ bnel $v0, $zero, .L8005DAA8
/* 038970 8005D570 27DE0001 */ addiu $fp, $fp, 1 /* 038970 8005D570 27DE0001 */ addiu $fp, $fp, 1
/* 038974 8005D574 C62600B0 */ lwc1 $f6, 0xb0($s1) /* 038974 8005D574 C62600B0 */ lwc1 $f6, 0xb0($s1)
/* 038978 8005D578 4606B080 */ add.s $f2, $f22, $f6 /* 038978 8005D578 4606B080 */ add.s $f2, $f22, $f6
@ -2681,7 +2691,7 @@ func_8005D51C:
/* 0389D4 8005D5D4 27DE0001 */ addiu $fp, $fp, 1 /* 0389D4 8005D5D4 27DE0001 */ addiu $fp, $fp, 1
/* 0389D8 8005D5D8 06C00016 */ bltz $s6, .L8005D634 /* 0389D8 8005D5D8 06C00016 */ bltz $s6, .L8005D634
/* 0389DC 8005D5DC 2AC20002 */ slti $v0, $s6, 2 /* 0389DC 8005D5DC 2AC20002 */ slti $v0, $s6, 2
/* 0389E0 8005D5E0 54400006 */ bnezl $v0, .L8005D5FC /* 0389E0 8005D5E0 54400006 */ bnel $v0, $zero, .L8005D5FC
/* 0389E4 8005D5E4 46063000 */ add.s $f0, $f6, $f6 /* 0389E4 8005D5E4 46063000 */ add.s $f0, $f6, $f6
/* 0389E8 8005D5E8 24020002 */ addiu $v0, $zero, 2 /* 0389E8 8005D5E8 24020002 */ addiu $v0, $zero, 2
/* 0389EC 8005D5EC 12C20005 */ beq $s6, $v0, .L8005D604 /* 0389EC 8005D5EC 12C20005 */ beq $s6, $v0, .L8005D604

10
papermario/asm/code_39210_len_aa0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8005DE10, "ax" .section .text8005DE10, "ax"

10
papermario/asm/code_39cb0_len_100.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8005E8B0, "ax" .section .text8005E8B0, "ax"

12
papermario/asm/code_39db0_len_8a0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8005E9B0, "ax" .section .text8005E9B0, "ax"
@ -183,7 +193,7 @@ func_8005EC18:
/* 03A060 8005EC60 24060001 */ addiu $a2, $zero, 1 /* 03A060 8005EC60 24060001 */ addiu $a2, $zero, 1
/* 03A064 8005EC64 0C01971C */ jal osSpTaskYielded /* 03A064 8005EC64 0C01971C */ jal osSpTaskYielded
/* 03A068 8005EC68 26240010 */ addiu $a0, $s1, 0x10 /* 03A068 8005EC68 26240010 */ addiu $a0, $s1, 0x10
/* 03A06C 8005EC6C 54400001 */ bnezl $v0, .L8005EC74 /* 03A06C 8005EC6C 54400001 */ bnel $v0, $zero, .L8005EC74
/* 03A070 8005EC70 24100001 */ addiu $s0, $zero, 1 /* 03A070 8005EC70 24100001 */ addiu $s0, $zero, 1
.L8005EC74: .L8005EC74:
/* 03A074 8005EC74 8FA20010 */ lw $v0, 0x10($sp) /* 03A074 8005EC74 8FA20010 */ lw $v0, 0x10($sp)

10
papermario/asm/code_3a650_len_40.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8005F250, "ax" .section .text8005F250, "ax"

10
papermario/asm/code_3a690_len_40.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8005F290, "ax" .section .text8005F290, "ax"

10
papermario/asm/code_3a6d0_len_20.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8005F2D0, "ax" .section .text8005F2D0, "ax"

10
papermario/asm/code_3a6f0_len_110.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8005F2F0, "ax" .section .text8005F2F0, "ax"

10
papermario/asm/code_3a800_len_30.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8005F400, "ax" .section .text8005F400, "ax"

10
papermario/asm/code_3a830_len_20.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8005F430, "ax" .section .text8005F430, "ax"

14
papermario/asm/code_3a850_le_a40.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8005F450, "ax" .section .text8005F450, "ax"
@ -524,7 +534,7 @@ contRmbControl:
.L8005FB7C: .L8005FB7C:
/* 03AF7C 8005FB7C 10400034 */ beqz $v0, .L8005FC50 /* 03AF7C 8005FB7C 10400034 */ beqz $v0, .L8005FC50
/* 03AF80 8005FB80 28620081 */ slti $v0, $v1, 0x81 /* 03AF80 8005FB80 28620081 */ slti $v0, $v1, 0x81
/* 03AF84 8005FB84 54400033 */ bnezl $v0, .L8005FC54 /* 03AF84 8005FB84 54400033 */ bnel $v0, $zero, .L8005FC54
/* 03AF88 8005FB88 26730068 */ addiu $s3, $s3, 0x68 /* 03AF88 8005FB88 26730068 */ addiu $s3, $s3, 0x68
/* 03AF8C 8005FB8C 08017F0E */ j func_8005FC38 /* 03AF8C 8005FB8C 08017F0E */ j func_8005FC38
/* 03AF90 8005FB90 00000000 */ nop /* 03AF90 8005FB90 00000000 */ nop
@ -532,7 +542,7 @@ contRmbControl:
.L8005FB94: .L8005FB94:
/* 03AF94 8005FB94 0C017E48 */ jal osMotorStop /* 03AF94 8005FB94 0C017E48 */ jal osMotorStop
/* 03AF98 8005FB98 0220282D */ daddu $a1, $s1, $zero /* 03AF98 8005FB98 0220282D */ daddu $a1, $s1, $zero
/* 03AF9C 8005FB9C 5440002C */ bnezl $v0, .L8005FC50 /* 03AF9C 8005FB9C 5440002C */ bnel $v0, $zero, .L8005FC50
/* 03AFA0 8005FBA0 A2000007 */ sb $zero, 7($s0) /* 03AFA0 8005FBA0 A2000007 */ sb $zero, 7($s0)
/* 03AFA4 8005FBA4 08017F15 */ j func_8005FC54 /* 03AFA4 8005FBA4 08017F15 */ j func_8005FC54
/* 03AFA8 8005FBA8 26730068 */ addiu $s3, $s3, 0x68 /* 03AFA8 8005FBA8 26730068 */ addiu $s3, $s3, 0x68

10
papermario/asm/code_3b290_len_100.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8005FE90, "ax" .section .text8005FE90, "ax"

10
papermario/asm/code_3b390_len_110.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text8005FF90, "ax" .section .text8005FF90, "ax"

10
papermario/asm/code_3b4a0_len_270.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text800600A0, "ax" .section .text800600A0, "ax"

10
papermario/asm/code_3b710_len_40.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80060310, "ax" .section .text80060310, "ax"

10
papermario/asm/code_3b750_len_20.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80060350, "ax" .section .text80060350, "ax"

10
papermario/asm/code_3b770_len_80.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80060370, "ax" .section .text80060370, "ax"

10
papermario/asm/code_3b7f0_len_120.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text800603F0, "ax" .section .text800603F0, "ax"

12
papermario/asm/code_3b910_len_410.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80060510, "ax" .section .text80060510, "ax"
@ -34,7 +44,7 @@ nuContMgrInit:
/* 03B980 80060580 3C02800B */ lui $v0, 0x800b /* 03B980 80060580 3C02800B */ lui $v0, 0x800b
/* 03B984 80060584 00431021 */ addu $v0, $v0, $v1 /* 03B984 80060584 00431021 */ addu $v0, $v0, $v1
/* 03B988 80060588 90421B7F */ lbu $v0, 0x1b7f($v0) /* 03B988 80060588 90421B7F */ lbu $v0, 0x1b7f($v0)
/* 03B98C 8006058C 5440000F */ bnezl $v0, .L800605CC /* 03B98C 8006058C 5440000F */ bnel $v0, $zero, .L800605CC
/* 03B990 80060590 24840001 */ addiu $a0, $a0, 1 /* 03B990 80060590 24840001 */ addiu $a0, $a0, 1
/* 03B994 80060594 3C02800B */ lui $v0, 0x800b /* 03B994 80060594 3C02800B */ lui $v0, 0x800b
/* 03B998 80060598 00431021 */ addu $v0, $v0, $v1 /* 03B998 80060598 00431021 */ addu $v0, $v0, $v1

10
papermario/asm/code_3bd20_len_c0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80060920, "ax" .section .text80060920, "ax"

12
papermario/asm/code_3bde0_len_3e0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text800609E0, "ax" .section .text800609E0, "ax"
@ -29,7 +39,7 @@ osCreatePiManager:
/* 03BE40 80060A40 24060001 */ addiu $a2, $zero, 1 /* 03BE40 80060A40 24060001 */ addiu $a2, $zero, 1
/* 03BE44 80060A44 3C028009 */ lui $v0, 0x8009 /* 03BE44 80060A44 3C028009 */ lui $v0, 0x8009
/* 03BE48 80060A48 8C423D90 */ lw $v0, 0x3d90($v0) /* 03BE48 80060A48 8C423D90 */ lw $v0, 0x3d90($v0)
/* 03BE4C 80060A4C 54400004 */ bnezl $v0, .L80060A60 /* 03BE4C 80060A4C 54400004 */ bnel $v0, $zero, .L80060A60
/* 03BE50 80060A50 24040008 */ addiu $a0, $zero, 8 /* 03BE50 80060A50 24040008 */ addiu $a0, $zero, 8
/* 03BE54 80060A54 0C018514 */ jal osPiCreateAccessQueue /* 03BE54 80060A54 0C018514 */ jal osPiCreateAccessQueue
/* 03BE58 80060A58 00000000 */ nop /* 03BE58 80060A58 00000000 */ nop

20
papermario/asm/code_3bf0_len_6f0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text800287F0, "ax" .section .text800287F0, "ax"
@ -169,7 +179,7 @@ update_input:
/* 003E40 80028A40 84620000 */ lh $v0, ($v1) /* 003E40 80028A40 84620000 */ lh $v0, ($v1)
/* 003E44 80028A44 00C2102A */ slt $v0, $a2, $v0 /* 003E44 80028A44 00C2102A */ slt $v0, $a2, $v0
func_80028A48: func_80028A48:
/* 003E48 80028A48 54400001 */ bnezl $v0, .L80028A50 /* 003E48 80028A48 54400001 */ bnel $v0, $zero, .L80028A50
/* 003E4C 80028A4C A4650000 */ sh $a1, ($v1) /* 003E4C 80028A4C A4650000 */ sh $a1, ($v1)
.L80028A50: .L80028A50:
/* 003E50 80028A50 00051400 */ sll $v0, $a1, 0x10 /* 003E50 80028A50 00051400 */ sll $v0, $a1, 0x10
@ -208,7 +218,7 @@ func_80028A54:
/* 003EC0 80028AC0 84620000 */ lh $v0, ($v1) /* 003EC0 80028AC0 84620000 */ lh $v0, ($v1)
/* 003EC4 80028AC4 0046102A */ slt $v0, $v0, $a2 /* 003EC4 80028AC4 0046102A */ slt $v0, $v0, $a2
func_80028AC8: func_80028AC8:
/* 003EC8 80028AC8 54400001 */ bnezl $v0, .L80028AD0 /* 003EC8 80028AC8 54400001 */ bnel $v0, $zero, .L80028AD0
/* 003ECC 80028ACC A4650000 */ sh $a1, ($v1) /* 003ECC 80028ACC A4650000 */ sh $a1, ($v1)
.L80028AD0: .L80028AD0:
/* 003ED0 80028AD0 0100102D */ daddu $v0, $t0, $zero /* 003ED0 80028AD0 0100102D */ daddu $v0, $t0, $zero
@ -255,7 +265,7 @@ func_80028AD4:
/* 003F58 80028B58 84620000 */ lh $v0, ($v1) /* 003F58 80028B58 84620000 */ lh $v0, ($v1)
/* 003F5C 80028B5C 00C2102A */ slt $v0, $a2, $v0 /* 003F5C 80028B5C 00C2102A */ slt $v0, $a2, $v0
func_80028B60: func_80028B60:
/* 003F60 80028B60 54400001 */ bnezl $v0, .L80028B68 /* 003F60 80028B60 54400001 */ bnel $v0, $zero, .L80028B68
/* 003F64 80028B64 A4670000 */ sh $a3, ($v1) /* 003F64 80028B64 A4670000 */ sh $a3, ($v1)
.L80028B68: .L80028B68:
/* 003F68 80028B68 00071400 */ sll $v0, $a3, 0x10 /* 003F68 80028B68 00071400 */ sll $v0, $a3, 0x10
@ -312,7 +322,7 @@ func_80028B6C:
/* 004010 80028C10 84620000 */ lh $v0, ($v1) /* 004010 80028C10 84620000 */ lh $v0, ($v1)
/* 004014 80028C14 0046102A */ slt $v0, $v0, $a2 /* 004014 80028C14 0046102A */ slt $v0, $v0, $a2
func_80028C18: func_80028C18:
/* 004018 80028C18 54400001 */ bnezl $v0, .L80028C20 /* 004018 80028C18 54400001 */ bnel $v0, $zero, .L80028C20
/* 00401C 80028C1C A4670000 */ sh $a3, ($v1) /* 00401C 80028C1C A4670000 */ sh $a3, ($v1)
.L80028C20: .L80028C20:
/* 004020 80028C20 0100102D */ daddu $v0, $t0, $zero /* 004020 80028C20 0100102D */ daddu $v0, $t0, $zero
@ -486,7 +496,7 @@ func_80028C24:
/* 004288 80028E88 2442FFFF */ addiu $v0, $v0, -1 /* 004288 80028E88 2442FFFF */ addiu $v0, $v0, -1
/* 00428C 80028E8C A4A20058 */ sh $v0, 0x58($a1) /* 00428C 80028E8C A4A20058 */ sh $v0, 0x58($a1)
/* 004290 80028E90 00021400 */ sll $v0, $v0, 0x10 /* 004290 80028E90 00021400 */ sll $v0, $v0, 0x10
/* 004294 80028E94 54400005 */ bnezl $v0, .L80028EAC /* 004294 80028E94 54400005 */ bnel $v0, $zero, .L80028EAC
/* 004298 80028E98 ACA00020 */ sw $zero, 0x20($a1) /* 004298 80028E98 ACA00020 */ sw $zero, 0x20($a1)
/* 00429C 80028E9C 8CA20000 */ lw $v0, ($a1) /* 00429C 80028E9C 8CA20000 */ lw $v0, ($a1)
/* 0042A0 80028EA0 94A30050 */ lhu $v1, 0x50($a1) /* 0042A0 80028EA0 94A30050 */ lhu $v1, 0x50($a1)

10
papermario/asm/code_3c1c0_len_60.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80060DC0, "ax" .section .text80060DC0, "ax"

10
papermario/asm/code_3c220_len_a0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80060E20, "ax" .section .text80060E20, "ax"

10
papermario/asm/code_3c2c0_len_50.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80060EC0, "ax" .section .text80060EC0, "ax"

10
papermario/asm/code_3c310_len_180.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80060F10, "ax" .section .text80060F10, "ax"

10
papermario/asm/code_3c490_len_3c0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80061090, "ax" .section .text80061090, "ax"

10
papermario/asm/code_3c850_len_f0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80061450, "ax" .section .text80061450, "ax"

10
papermario/asm/code_3c940_len_140.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80061540, "ax" .section .text80061540, "ax"

10
papermario/asm/code_3ca80_len_a0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80061680, "ax" .section .text80061680, "ax"

10
papermario/asm/code_3cb20_len_130.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80061720, "ax" .section .text80061720, "ax"

10
papermario/asm/code_3cc50_len_80.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80061850, "ax" .section .text80061850, "ax"

10
papermario/asm/code_3ccd0_len_30.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text800618D0, "ax" .section .text800618D0, "ax"

12
papermario/asm/code_3cd00_len_5f0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80061900, "ax" .section .text80061900, "ax"
@ -205,7 +215,7 @@ osContInit:
/* 03CFD0 80061BD0 AC223DB0 */ sw $v0, 0x3db0($at) /* 03CFD0 80061BD0 AC223DB0 */ sw $v0, 0x3db0($at)
/* 03CFD4 80061BD4 00409021 */ addu $s2, $v0, $zero /* 03CFD4 80061BD4 00409021 */ addu $s2, $v0, $zero
/* 03CFD8 80061BD8 00609821 */ addu $s3, $v1, $zero /* 03CFD8 80061BD8 00609821 */ addu $s3, $v1, $zero
/* 03CFDC 80061BDC 56400022 */ bnezl $s2, .L80061C68 /* 03CFDC 80061BDC 56400022 */ bnel $s2, $zero, .L80061C68
/* 03CFE0 80061BE0 24020004 */ addiu $v0, $zero, 4 /* 03CFE0 80061BE0 24020004 */ addiu $v0, $zero, 4
/* 03CFE4 80061BE4 16400007 */ bnez $s2, .L80061C04 /* 03CFE4 80061BE4 16400007 */ bnez $s2, .L80061C04
/* 03CFE8 80061BE8 27B10040 */ addiu $s1, $sp, 0x40 /* 03CFE8 80061BE8 27B10040 */ addiu $s1, $sp, 0x40

10
papermario/asm/code_3d2f0_len_10.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80061EF0, "ax" .section .text80061EF0, "ax"

10
papermario/asm/code_3d300_len_30.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80061F00, "ax" .section .text80061F00, "ax"

10
papermario/asm/code_3d330_len_990.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80061F30, "ax" .section .text80061F30, "ax"

10
papermario/asm/code_3dcc0_len_a60.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text800628C0, "ax" .section .text800628C0, "ax"

10
papermario/asm/code_3e720_len_5f0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80063320, "ax" .section .text80063320, "ax"

10
papermario/asm/code_3ed10_len_600.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80063910, "ax" .section .text80063910, "ax"

10
papermario/asm/code_3f310_len_3c0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80063F10, "ax" .section .text80063F10, "ax"

10
papermario/asm/code_3f6d0_len_320.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text800642D0, "ax" .section .text800642D0, "ax"

10
papermario/asm/code_3f9f0_len_60.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text800645F0, "ax" .section .text800645F0, "ax"

16
papermario/asm/code_3fa50_len_f60.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80064650, "ax" .section .text80064650, "ax"
@ -302,7 +312,7 @@ strlen:
/* 03FE5C 80064A5C 24630001 */ addiu $v1, $v1, 1 /* 03FE5C 80064A5C 24630001 */ addiu $v1, $v1, 1
.L80064A60: .L80064A60:
/* 03FE60 80064A60 80620000 */ lb $v0, ($v1) /* 03FE60 80064A60 80620000 */ lb $v0, ($v1)
/* 03FE64 80064A64 5440FFFE */ bnezl $v0, .L80064A60 /* 03FE64 80064A64 5440FFFE */ bnel $v0, $zero, .L80064A60
/* 03FE68 80064A68 24630001 */ addiu $v1, $v1, 1 /* 03FE68 80064A68 24630001 */ addiu $v1, $v1, 1
.L80064A6C: .L80064A6C:
/* 03FE6C 80064A6C 03E00008 */ jr $ra /* 03FE6C 80064A6C 03E00008 */ jr $ra
@ -354,7 +364,7 @@ func_80064AF4:
/* 03FEF8 80064AF8 38420025 */ xori $v0, $v0, 0x25 /* 03FEF8 80064AF8 38420025 */ xori $v0, $v0, 0x25
/* 03FEFC 80064AFC 0002102B */ sltu $v0, $zero, $v0 /* 03FEFC 80064AFC 0002102B */ sltu $v0, $zero, $v0
/* 03FF00 80064B00 00621824 */ and $v1, $v1, $v0 /* 03FF00 80064B00 00621824 */ and $v1, $v1, $v0
/* 03FF04 80064B04 5460FFF9 */ bnezl $v1, .L80064AEC /* 03FF04 80064B04 5460FFF9 */ bnel $v1, $zero, .L80064AEC
/* 03FF08 80064B08 26520001 */ addiu $s2, $s2, 1 /* 03FF08 80064B08 26520001 */ addiu $s2, $s2, 1
/* 03FF0C 80064B0C 02458023 */ subu $s0, $s2, $a1 /* 03FF0C 80064B0C 02458023 */ subu $s0, $s2, $a1
/* 03FF10 80064B10 1A000009 */ blez $s0, .L80064B38 /* 03FF10 80064B10 1A000009 */ blez $s0, .L80064B38
@ -1052,7 +1062,7 @@ func_80065358:
/* 040894 80065494 04600012 */ bltz $v1, .L800654E0 /* 040894 80065494 04600012 */ bltz $v1, .L800654E0
/* 040898 80065498 AE020014 */ sw $v0, 0x14($s0) /* 040898 80065498 AE020014 */ sw $v0, 0x14($s0)
/* 04089C 8006549C 0062102A */ slt $v0, $v1, $v0 /* 04089C 8006549C 0062102A */ slt $v0, $v1, $v0
/* 0408A0 800654A0 5440000F */ bnezl $v0, .L800654E0 /* 0408A0 800654A0 5440000F */ bnel $v0, $zero, .L800654E0
/* 0408A4 800654A4 AE030014 */ sw $v1, 0x14($s0) /* 0408A4 800654A4 AE030014 */ sw $v1, 0x14($s0)
/* 0408A8 800654A8 08019538 */ j func_800654E0 /* 0408A8 800654A8 08019538 */ j func_800654E0
/* 0408AC 800654AC 00000000 */ nop /* 0408AC 800654AC 00000000 */ nop

10
papermario/asm/code_409b0_len_140.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text800655B0, "ax" .section .text800655B0, "ax"

10
papermario/asm/code_40af0_len_130.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text800656F0, "ax" .section .text800656F0, "ax"

10
papermario/asm/code_40c20_len_1f0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80065820, "ax" .section .text80065820, "ax"

10
papermario/asm/code_40e10_len_240.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80065A10, "ax" .section .text80065A10, "ax"

12
papermario/asm/code_41050_len_120.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80065C50, "ax" .section .text80065C50, "ax"
@ -60,7 +70,7 @@ osSiRawStartDma:
/* 04110C 80065D0C 02202021 */ addu $a0, $s1, $zero /* 04110C 80065D0C 02202021 */ addu $a0, $s1, $zero
/* 041110 80065D10 3C03A480 */ lui $v1, 0xa480 /* 041110 80065D10 3C03A480 */ lui $v1, 0xa480
/* 041114 80065D14 AC620000 */ sw $v0, ($v1) /* 041114 80065D14 AC620000 */ sw $v0, ($v1)
/* 041118 80065D18 56000003 */ bnezl $s0, .L80065D28 /* 041118 80065D18 56000003 */ bnel $s0, $zero, .L80065D28
/* 04111C 80065D1C 3C03A480 */ lui $v1, 0xa480 /* 04111C 80065D1C 3C03A480 */ lui $v1, 0xa480
/* 041120 80065D20 0801974B */ j func_80065D2C /* 041120 80065D20 0801974B */ j func_80065D2C
/* 041124 80065D24 34630004 */ ori $v1, $v1, 4 /* 041124 80065D24 34630004 */ ori $v1, $v1, 4

10
papermario/asm/code_41170_len_f0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80065D70, "ax" .section .text80065D70, "ax"

10
papermario/asm/code_41260_len_f0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80065E60, "ax" .section .text80065E60, "ax"

10
papermario/asm/code_41350_len_d0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80065F50, "ax" .section .text80065F50, "ax"

10
papermario/asm/code_41420_len_120.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80066020, "ax" .section .text80066020, "ax"

10
papermario/asm/code_41540_len_c0.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80066140, "ax" .section .text80066140, "ax"

10
papermario/asm/code_41600_len_40.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80066200, "ax" .section .text80066200, "ax"

10
papermario/asm/code_41640_len_50.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80066240, "ax" .section .text80066240, "ax"

10
papermario/asm/code_41690_len_10.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80066290, "ax" .section .text80066290, "ax"

10
papermario/asm/code_416a0_len_90.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text800662A0, "ax" .section .text800662A0, "ax"

10
papermario/asm/code_41730_len_20.s
View File

@ -1,3 +1,13 @@
# %s disassembly and split file
# generated by n64split v%s - N64 ROM splitter
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.include "globals.inc"
.section .text80066330, "ax" .section .text80066330, "ax"

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