.include "macro.inc"

/* assembler directives */
.set noat      /* allow manual use of $at */
.set noreorder /* don't insert nops after branches */
.set gp=64     /* allow use of 64-bit general purpose registers */

.section .text, "ax"

/* Generated by spimdisasm 1.11.1 */

glabel guMtxF2L
/* 428E0 800674E0 3C014780 */  lui       $at, (0x47800000 >> 16)
/* 428E4 800674E4 44810000 */  mtc1      $at, $f0
/* 428E8 800674E8 3C19FFFF */  lui       $t9, (0xFFFF0000 >> 16)
/* 428EC 800674EC 24B80020 */  addiu     $t8, $a1, 0x20
.LJP_800674F0:
/* 428F0 800674F0 C4840000 */  lwc1      $f4, 0x0($a0)
/* 428F4 800674F4 46002182 */  mul.s     $f6, $f4, $f0
/* 428F8 800674F8 4600320D */  trunc.w.s $f8, $f6
/* 428FC 800674FC C48A0004 */  lwc1      $f10, 0x4($a0)
/* 42900 80067500 46005402 */  mul.s     $f16, $f10, $f0
/* 42904 80067504 4600848D */  trunc.w.s $f18, $f16
/* 42908 80067508 44084000 */  mfc1      $t0, $f8
/* 4290C 8006750C 44099000 */  mfc1      $t1, $f18
/* 42910 80067510 01195024 */  and       $t2, $t0, $t9
/* 42914 80067514 00095C02 */  srl       $t3, $t1, 16
/* 42918 80067518 014B6025 */  or        $t4, $t2, $t3
/* 4291C 8006751C ACAC0000 */  sw        $t4, 0x0($a1)
/* 42920 80067520 00086C00 */  sll       $t5, $t0, 16
/* 42924 80067524 312EFFFF */  andi      $t6, $t1, 0xFFFF
/* 42928 80067528 01AE7825 */  or        $t7, $t5, $t6
/* 4292C 8006752C ACAF0020 */  sw        $t7, 0x20($a1)
/* 42930 80067530 24A50004 */  addiu     $a1, $a1, 0x4
/* 42934 80067534 14B8FFEE */  bne       $a1, $t8, .LJP_800674F0
/* 42938 80067538 24840008 */   addiu    $a0, $a0, 0x8
/* 4293C 8006753C 03E00008 */  jr        $ra
/* 42940 80067540 00000000 */   nop
/* 42944 80067544 00000000 */  nop
/* 42948 80067548 00000000 */  nop
/* 4294C 8006754C 00000000 */  nop
/* 42950 80067550 00000000 */  nop
/* 42954 80067554 00000000 */  nop
/* 42958 80067558 00000000 */  nop
/* 4295C 8006755C 00000000 */  nop