.include "macro.inc"

/* assembler directives */
.set noat      /* allow manual use of $at */
.set noreorder /* don't insert nops after branches */
.set gp=64     /* allow use of 64-bit general purpose registers */

.section .text, "ax"

/* Generated by spimdisasm 1.11.1 */

glabel guMtxL2F
/* 40F40 80065B40 3C013780 */  lui       $at, (0x37800000 >> 16)
/* 40F44 80065B44 44810000 */  mtc1      $at, $f0
/* 40F48 80065B48 3C19FFFF */  lui       $t9, (0xFFFF0000 >> 16)
/* 40F4C 80065B4C 24B80020 */  addiu     $t8, $a1, 0x20
.LIQUE_80065B50:
/* 40F50 80065B50 8CA80000 */  lw        $t0, 0x0($a1)
/* 40F54 80065B54 8CA90020 */  lw        $t1, 0x20($a1)
/* 40F58 80065B58 01195024 */  and       $t2, $t0, $t9
/* 40F5C 80065B5C 00095C02 */  srl       $t3, $t1, 16
/* 40F60 80065B60 014B6025 */  or        $t4, $t2, $t3
/* 40F64 80065B64 00086C00 */  sll       $t5, $t0, 16
/* 40F68 80065B68 312EFFFF */  andi      $t6, $t1, 0xFFFF
/* 40F6C 80065B6C 01AE7825 */  or        $t7, $t5, $t6
/* 40F70 80065B70 448C2000 */  mtc1      $t4, $f4
/* 40F74 80065B74 468021A0 */  cvt.s.w   $f6, $f4
/* 40F78 80065B78 46003202 */  mul.s     $f8, $f6, $f0
/* 40F7C 80065B7C 448F5000 */  mtc1      $t7, $f10
/* 40F80 80065B80 46805420 */  cvt.s.w   $f16, $f10
/* 40F84 80065B84 46008482 */  mul.s     $f18, $f16, $f0
/* 40F88 80065B88 E4880000 */  swc1      $f8, 0x0($a0)
/* 40F8C 80065B8C E4920004 */  swc1      $f18, 0x4($a0)
/* 40F90 80065B90 24A50004 */  addiu     $a1, $a1, 0x4
/* 40F94 80065B94 14B8FFEE */  bne       $a1, $t8, .LIQUE_80065B50
/* 40F98 80065B98 24840008 */   addiu    $a0, $a0, 0x8
/* 40F9C 80065B9C 03E00008 */  jr        $ra
/* 40FA0 80065BA0 00000000 */   nop
/* 40FA4 80065BA4 00000000 */  nop
/* 40FA8 80065BA8 00000000 */  nop
/* 40FAC 80065BAC 00000000 */  nop
/* 40FB0 80065BB0 00000000 */  nop
/* 40FB4 80065BB4 00000000 */  nop
/* 40FB8 80065BB8 00000000 */  nop
/* 40FBC 80065BBC 00000000 */  nop