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63 lines
2.4 KiB
ArmAsm
63 lines
2.4 KiB
ArmAsm
.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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glabel func_801110B4
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/* 0A77B4 801110B4 2407FFFF */ addiu $a3, $zero, -1
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/* 0A77B8 801110B8 3C08000F */ lui $t0, 0xf
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/* 0A77BC 801110BC 8C820008 */ lw $v0, 8($a0)
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/* 0A77C0 801110C0 3508FFFF */ ori $t0, $t0, 0xffff
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/* 0A77C4 801110C4 00A22021 */ addu $a0, $a1, $v0
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.L801110C8:
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/* 0A77C8 801110C8 8C820000 */ lw $v0, ($a0)
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/* 0A77CC 801110CC 14470003 */ bne $v0, $a3, .L801110DC
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/* 0A77D0 801110D0 3042FFFF */ andi $v0, $v0, 0xffff
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/* 0A77D4 801110D4 03E00008 */ jr $ra
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/* 0A77D8 801110D8 AC800000 */ sw $zero, ($a0)
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.L801110DC:
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/* 0A77DC 801110DC 00A21821 */ addu $v1, $a1, $v0
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/* 0A77E0 801110E0 AC830000 */ sw $v1, ($a0)
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/* 0A77E4 801110E4 8C620000 */ lw $v0, ($v1)
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/* 0A77E8 801110E8 10470005 */ beq $v0, $a3, .L80111100
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/* 0A77EC 801110EC 24840004 */ addiu $a0, $a0, 4
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/* 0A77F0 801110F0 3042FFFF */ andi $v0, $v0, 0xffff
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/* 0A77F4 801110F4 00C21021 */ addu $v0, $a2, $v0
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/* 0A77F8 801110F8 08044441 */ j .L80111104
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/* 0A77FC 801110FC AC620000 */ sw $v0, ($v1)
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.L80111100:
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/* 0A7800 80111100 AC600000 */ sw $zero, ($v1)
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.L80111104:
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/* 0A7804 80111104 8C620018 */ lw $v0, 0x18($v1)
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/* 0A7808 80111108 10470004 */ beq $v0, $a3, .L8011111C
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/* 0A780C 8011110C 3042FFFF */ andi $v0, $v0, 0xffff
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/* 0A7810 80111110 00A21021 */ addu $v0, $a1, $v0
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/* 0A7814 80111114 08044448 */ j .L80111120
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/* 0A7818 80111118 AC620018 */ sw $v0, 0x18($v1)
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.L8011111C:
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/* 0A781C 8011111C AC600018 */ sw $zero, 0x18($v1)
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.L80111120:
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/* 0A7820 80111120 8C62001C */ lw $v0, 0x1c($v1)
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/* 0A7824 80111124 10470004 */ beq $v0, $a3, .L80111138
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/* 0A7828 80111128 3042FFFF */ andi $v0, $v0, 0xffff
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/* 0A782C 8011112C 00A21021 */ addu $v0, $a1, $v0
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/* 0A7830 80111130 0804444F */ j .L8011113C
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/* 0A7834 80111134 AC62001C */ sw $v0, 0x1c($v1)
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.L80111138:
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/* 0A7838 80111138 AC60001C */ sw $zero, 0x1c($v1)
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.L8011113C:
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/* 0A783C 8011113C 8C620024 */ lw $v0, 0x24($v1)
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/* 0A7840 80111140 10470004 */ beq $v0, $a3, .L80111154
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/* 0A7844 80111144 00481024 */ and $v0, $v0, $t0
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/* 0A7848 80111148 00C21021 */ addu $v0, $a2, $v0
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/* 0A784C 8011114C 08044432 */ j .L801110C8
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/* 0A7850 80111150 AC620024 */ sw $v0, 0x24($v1)
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.L80111154:
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/* 0A7854 80111154 08044432 */ j .L801110C8
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/* 0A7858 80111158 AC600024 */ sw $zero, 0x24($v1)
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