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5511e18133
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225 lines
6.5 KiB
C
225 lines
6.5 KiB
C
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/*====================================================================
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* os_pi.h
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*
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* Copyright 1995, Silicon Graphics, Inc.
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* All Rights Reserved.
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*
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* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Silicon Graphics,
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* Inc.; the contents of this file may not be disclosed to third
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* parties, copied or duplicated in any form, in whole or in part,
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* without the prior written permission of Silicon Graphics, Inc.
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*
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* RESTRICTED RIGHTS LEGEND:
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* Use, duplication or disclosure by the Government is subject to
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* restrictions as set forth in subdivision (c)(1)(ii) of the Rights
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* in Technical Data and Computer Software clause at DFARS
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* 252.227-7013, and/or in similar or successor clauses in the FAR,
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* DOD or NASA FAR Supplement. Unpublished - rights reserved under the
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* Copyright Laws of the United States.
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*====================================================================*/
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/*---------------------------------------------------------------------*
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Copyright (C) 1998 Nintendo. (Originated by SGI)
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$RCSfile: os_pi.h,v $
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$Revision: 1.1 $
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$Date: 1998/10/09 08:01:16 $
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*---------------------------------------------------------------------*/
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#ifndef _OS_PI_H_
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#define _OS_PI_H_
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#ifdef _LANGUAGE_C_PLUS_PLUS
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extern "C" {
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#endif
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#include <PR/ultratypes.h>
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#include "os_thread.h"
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#include "os_message.h"
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#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
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/**************************************************************************
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*
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* Type definitions
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*
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*/
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/*
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* Structure for Enhanced PI interface
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*/
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/*
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* OSTranxInfo is set up for Leo Disk DMA. This info will be maintained
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* by exception handler. This is how the PIMGR and the ISR communicate.
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*/
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typedef struct {
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u32 errStatus; /* error status */
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void *dramAddr; /* RDRAM buffer address (DMA) */
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void *C2Addr; /* C2 buffer address */
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u32 sectorSize; /* size of transfering sector */
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u32 C1ErrNum; /* total # of C1 errors */
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u32 C1ErrSector[4]; /* error sectors */
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} __OSBlockInfo;
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typedef struct {
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u32 cmdType; /* for disk only */
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u16 transferMode; /* Block, Track, or sector? */
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u16 blockNum; /* which block is transfering */
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s32 sectorNum; /* which sector is transfering */
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u32 devAddr; /* Device buffer address */
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u32 bmCtlShadow; /* asic bm_ctl(510) register shadow ram */
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u32 seqCtlShadow; /* asic seq_ctl(518) register shadow ram */
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__OSBlockInfo block[2]; /* bolck transfer info */
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} __OSTranxInfo;
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typedef struct OSPiHandle_s {
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struct OSPiHandle_s *next; /* point to next handle on the table */
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u8 type; /* DEVICE_TYPE_BULK for disk */
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u8 latency; /* domain latency */
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u8 pageSize; /* domain page size */
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u8 relDuration; /* domain release duration */
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u8 pulse; /* domain pulse width */
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u8 domain; /* which domain */
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u32 baseAddress; /* Domain address */
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u32 speed; /* for roms only */
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/* The following are "private" elements" */
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__OSTranxInfo transferInfo; /* for disk only */
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} OSPiHandle;
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typedef struct {
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u8 type;
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u32 address;
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} OSPiInfo;
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/*
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* Structure for I/O message block
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*/
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typedef struct {
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u16 type; /* Message type */
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u8 pri; /* Message priority (High or Normal) */
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u8 status; /* Return status */
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OSMesgQueue *retQueue; /* Return message queue to notify I/O
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* completion */
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} OSIoMesgHdr;
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typedef struct {
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OSIoMesgHdr hdr; /* Message header */
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void * dramAddr; /* RDRAM buffer address (DMA) */
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u32 devAddr; /* Device buffer address (DMA) */
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u32 size; /* DMA transfer size in bytes */
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OSPiHandle *piHandle; /* PI device handle */
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} OSIoMesg;
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/*
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* Structure for device manager block
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*/
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typedef struct {
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s32 active; /* Status flag */
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OSThread *thread; /* Calling thread */
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OSMesgQueue *cmdQueue; /* Command queue */
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OSMesgQueue *evtQueue; /* Event queue */
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OSMesgQueue *acsQueue; /* Access queue */
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/* Raw DMA routine */
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s32 (*dma)(s32, u32, void *, u32);
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s32 (*edma)(OSPiHandle *, s32, u32, void *, u32);
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} OSDevMgr;
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#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
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/**************************************************************************
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*
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* Global definitions
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*
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*/
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/* Flags to indicate direction of data transfer */
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#define OS_READ 0 /* device -> RDRAM */
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#define OS_WRITE 1 /* device <- RDRAM */
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#define OS_OTHERS 2 /* for Leo disk only */
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/*
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* I/O message types
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*/
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#define OS_MESG_TYPE_BASE (10)
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#define OS_MESG_TYPE_LOOPBACK (OS_MESG_TYPE_BASE+0)
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#define OS_MESG_TYPE_DMAREAD (OS_MESG_TYPE_BASE+1)
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#define OS_MESG_TYPE_DMAWRITE (OS_MESG_TYPE_BASE+2)
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#define OS_MESG_TYPE_VRETRACE (OS_MESG_TYPE_BASE+3)
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#define OS_MESG_TYPE_COUNTER (OS_MESG_TYPE_BASE+4)
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#define OS_MESG_TYPE_EDMAREAD (OS_MESG_TYPE_BASE+5)
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#define OS_MESG_TYPE_EDMAWRITE (OS_MESG_TYPE_BASE+6)
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/*
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* I/O message priority
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*/
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#define OS_MESG_PRI_NORMAL 0
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#define OS_MESG_PRI_HIGH 1
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/*
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* PI/EPI
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*/
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#define PI_DOMAIN1 0
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#define PI_DOMAIN2 1
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#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
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/**************************************************************************
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*
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* Macro definitions
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*
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*/
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/**************************************************************************
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*
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* Extern variables
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*
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*/
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extern OSPiHandle *__osPiTable; /* The head of OSPiHandle link list */
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/**************************************************************************
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*
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* Function prototypes
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*
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*/
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/* Peripheral interface (Pi) */
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extern u32 osPiGetStatus(void);
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extern s32 osPiGetDeviceType(void);
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extern s32 osPiWriteIo(u32, u32);
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extern s32 osPiReadIo(u32, u32 *);
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extern s32 osPiStartDma(OSIoMesg *, s32, s32, u32, void *, u32,
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OSMesgQueue *);
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extern void osCreatePiManager(OSPri, OSMesgQueue *, OSMesg *, s32);
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/* Enhanced PI interface */
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extern OSPiHandle *osCartRomInit(void);
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extern OSPiHandle *osLeoDiskInit(void);
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extern OSPiHandle *osDriveRomInit(void);
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extern s32 osEPiDeviceType(OSPiHandle *, OSPiInfo *);
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extern s32 osEPiWriteIo(OSPiHandle *, u32 , u32 );
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extern s32 osEPiReadIo(OSPiHandle *, u32 , u32 *);
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extern s32 osEPiStartDma(OSPiHandle *, OSIoMesg *, s32);
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extern s32 osEPiLinkHandle(OSPiHandle *);
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#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
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#ifdef _LANGUAGE_C_PLUS_PLUS
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}
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#endif
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#endif /* !_OS_PI_H_ */
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