mirror of
https://github.com/pmret/papermario.git
synced 2024-11-18 17:02:46 +01:00
698cf99458
* jp cod * just have less code and it works * oops * removing splat cause subrepo is being dumb * git subrepo clone https://github.com/ethteck/splat.git tools/splat subrepo: subdir: "tools/splat" merged: "d7281bae6a" upstream: origin: "https://github.com/ethteck/splat.git" branch: "master" commit: "d7281bae6a" git-subrepo: version: "0.4.3" origin: "https://github.com/ingydotnet/git-subrepo" commit: "2f68596" * move jp stuff + revert configure * git subrepo pull tools/splat subrepo: subdir: "tools/splat" merged: "c56195a9c5" upstream: origin: "https://github.com/ethteck/splat.git" branch: "master" commit: "c56195a9c5" git-subrepo: version: "0.4.3" origin: "https://github.com/ingydotnet/git-subrepo" commit: "2f68596"
122 lines
6.1 KiB
ArmAsm
122 lines
6.1 KiB
ArmAsm
.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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glabel func_8002DFA4
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/* 93A4 8002DFA4 3C08800B */ lui $t0, %hi(D_800B1D60)
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/* 93A8 8002DFA8 25081D60 */ addiu $t0, $t0, %lo(D_800B1D60)
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/* 93AC 8002DFAC 00042400 */ sll $a0, $a0, 0x10
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/* 93B0 8002DFB0 00042403 */ sra $a0, $a0, 0x10
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/* 93B4 8002DFB4 00041880 */ sll $v1, $a0, 2
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/* 93B8 8002DFB8 00641821 */ addu $v1, $v1, $a0
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/* 93BC 8002DFBC 00031880 */ sll $v1, $v1, 2
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/* 93C0 8002DFC0 00641823 */ subu $v1, $v1, $a0
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/* 93C4 8002DFC4 000310C0 */ sll $v0, $v1, 3
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/* 93C8 8002DFC8 00621821 */ addu $v1, $v1, $v0
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/* 93CC 8002DFCC 000318C0 */ sll $v1, $v1, 3
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/* 93D0 8002DFD0 00681821 */ addu $v1, $v1, $t0
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/* 93D4 8002DFD4 A467000A */ sh $a3, 0xa($v1)
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/* 93D8 8002DFD8 A465000E */ sh $a1, 0xe($v1)
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/* 93DC 8002DFDC 00E0282D */ daddu $a1, $a3, $zero
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/* 93E0 8002DFE0 A4660010 */ sh $a2, 0x10($v1)
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/* 93E4 8002DFE4 8FA40010 */ lw $a0, 0x10($sp)
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/* 93E8 8002DFE8 240201FF */ addiu $v0, $zero, 0x1ff
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/* 93EC 8002DFEC A46200A4 */ sh $v0, 0xa4($v1)
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/* 93F0 8002DFF0 A46200AC */ sh $v0, 0xac($v1)
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/* 93F4 8002DFF4 A46200B4 */ sh $v0, 0xb4($v1)
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/* 93F8 8002DFF8 9462000E */ lhu $v0, 0xe($v1)
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/* 93FC 8002DFFC 00052C00 */ sll $a1, $a1, 0x10
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/* 9400 8002E000 A46000A6 */ sh $zero, 0xa6($v1)
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/* 9404 8002E004 A46000AE */ sh $zero, 0xae($v1)
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/* 9408 8002E008 A46000B6 */ sh $zero, 0xb6($v1)
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/* 940C 8002E00C A464000C */ sh $a0, 0xc($v1)
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/* 9410 8002E010 00052403 */ sra $a0, $a1, 0x10
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/* 9414 8002E014 00052FC2 */ srl $a1, $a1, 0x1f
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/* 9418 8002E018 00852021 */ addu $a0, $a0, $a1
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/* 941C 8002E01C 00042043 */ sra $a0, $a0, 1
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/* 9420 8002E020 00441021 */ addu $v0, $v0, $a0
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/* 9424 8002E024 00021400 */ sll $v0, $v0, 0x10
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/* 9428 8002E028 8464000A */ lh $a0, 0xa($v1)
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/* 942C 8002E02C 00021383 */ sra $v0, $v0, 0xe
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/* 9430 8002E030 A46200A8 */ sh $v0, 0xa8($v1)
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/* 9434 8002E034 9462000C */ lhu $v0, 0xc($v1)
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/* 9438 8002E038 44840000 */ mtc1 $a0, $f0
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/* 943C 8002E03C 00000000 */ nop
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/* 9440 8002E040 46800020 */ cvt.s.w $f0, $f0
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/* 9444 8002E044 00021400 */ sll $v0, $v0, 0x10
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/* 9448 8002E048 00022403 */ sra $a0, $v0, 0x10
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/* 944C 8002E04C 000217C2 */ srl $v0, $v0, 0x1f
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/* 9450 8002E050 00822021 */ addu $a0, $a0, $v0
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/* 9454 8002E054 00C0102D */ daddu $v0, $a2, $zero
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/* 9458 8002E058 00042043 */ sra $a0, $a0, 1
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/* 945C 8002E05C 00441021 */ addu $v0, $v0, $a0
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/* 9460 8002E060 00021400 */ sll $v0, $v0, 0x10
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/* 9464 8002E064 00021383 */ sra $v0, $v0, 0xe
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/* 9468 8002E068 46000000 */ add.s $f0, $f0, $f0
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/* 946C 8002E06C A46200AA */ sh $v0, 0xaa($v1)
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/* 9470 8002E070 8462000A */ lh $v0, 0xa($v1)
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/* 9474 8002E074 4600010D */ trunc.w.s $f4, $f0
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/* 9478 8002E078 44042000 */ mfc1 $a0, $f4
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/* 947C 8002E07C 44820000 */ mtc1 $v0, $f0
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/* 9480 8002E080 00000000 */ nop
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/* 9484 8002E084 46800020 */ cvt.s.w $f0, $f0
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/* 9488 8002E088 46000000 */ add.s $f0, $f0, $f0
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/* 948C 8002E08C 8462000C */ lh $v0, 0xc($v1)
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/* 9490 8002E090 3C068007 */ lui $a2, %hi(D_8007417C)
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/* 9494 8002E094 8CC6417C */ lw $a2, %lo(D_8007417C)($a2)
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/* 9498 8002E098 44821000 */ mtc1 $v0, $f2
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/* 949C 8002E09C 00000000 */ nop
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/* 94A0 8002E0A0 468010A0 */ cvt.s.w $f2, $f2
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/* 94A4 8002E0A4 4600010D */ trunc.w.s $f4, $f0
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/* 94A8 8002E0A8 44022000 */ mfc1 $v0, $f4
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/* 94AC 8002E0AC 00000000 */ nop
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/* 94B0 8002E0B0 A46200B0 */ sh $v0, 0xb0($v1)
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/* 94B4 8002E0B4 8462000C */ lh $v0, 0xc($v1)
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/* 94B8 8002E0B8 46021080 */ add.s $f2, $f2, $f2
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/* 94BC 8002E0BC A46400A0 */ sh $a0, 0xa0($v1)
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/* 94C0 8002E0C0 44820000 */ mtc1 $v0, $f0
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/* 94C4 8002E0C4 00000000 */ nop
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/* 94C8 8002E0C8 46800020 */ cvt.s.w $f0, $f0
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/* 94CC 8002E0CC 46000000 */ add.s $f0, $f0, $f0
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/* 94D0 8002E0D0 4600110D */ trunc.w.s $f4, $f2
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/* 94D4 8002E0D4 44042000 */ mfc1 $a0, $f4
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/* 94D8 8002E0D8 00000000 */ nop
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/* 94DC 8002E0DC A46400A2 */ sh $a0, 0xa2($v1)
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/* 94E0 8002E0E0 4600010D */ trunc.w.s $f4, $f0
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/* 94E4 8002E0E4 44022000 */ mfc1 $v0, $f4
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/* 94E8 8002E0E8 00000000 */ nop
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/* 94EC 8002E0EC A46200B2 */ sh $v0, 0xb2($v1)
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/* 94F0 8002E0F0 00E0102D */ daddu $v0, $a3, $zero
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/* 94F4 8002E0F4 00021400 */ sll $v0, $v0, 0x10
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/* 94F8 8002E0F8 00022403 */ sra $a0, $v0, 0x10
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/* 94FC 8002E0FC 000217C2 */ srl $v0, $v0, 0x1f
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/* 9500 8002E100 00822021 */ addu $a0, $a0, $v0
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/* 9504 8002E104 00042043 */ sra $a0, $a0, 1
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/* 9508 8002E108 90C50082 */ lbu $a1, 0x82($a2)
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/* 950C 8002E10C 9462000E */ lhu $v0, 0xe($v1)
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/* 9510 8002E110 00052E00 */ sll $a1, $a1, 0x18
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/* 9514 8002E114 00052E03 */ sra $a1, $a1, 0x18
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/* 9518 8002E118 00441021 */ addu $v0, $v0, $a0
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/* 951C 8002E11C 00021400 */ sll $v0, $v0, 0x10
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/* 9520 8002E120 00021383 */ sra $v0, $v0, 0xe
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/* 9524 8002E124 00A22821 */ addu $a1, $a1, $v0
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/* 9528 8002E128 A46500B8 */ sh $a1, 0xb8($v1)
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/* 952C 8002E12C 90C50083 */ lbu $a1, 0x83($a2)
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/* 9530 8002E130 9462000C */ lhu $v0, 0xc($v1)
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/* 9534 8002E134 00052E00 */ sll $a1, $a1, 0x18
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/* 9538 8002E138 00052E03 */ sra $a1, $a1, 0x18
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/* 953C 8002E13C 00021400 */ sll $v0, $v0, 0x10
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/* 9540 8002E140 00022403 */ sra $a0, $v0, 0x10
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/* 9544 8002E144 000217C2 */ srl $v0, $v0, 0x1f
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/* 9548 8002E148 00822021 */ addu $a0, $a0, $v0
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/* 954C 8002E14C 94620010 */ lhu $v0, 0x10($v1)
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/* 9550 8002E150 00042043 */ sra $a0, $a0, 1
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/* 9554 8002E154 00441021 */ addu $v0, $v0, $a0
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/* 9558 8002E158 00021400 */ sll $v0, $v0, 0x10
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/* 955C 8002E15C 00021383 */ sra $v0, $v0, 0xe
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/* 9560 8002E160 00A22821 */ addu $a1, $a1, $v0
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/* 9564 8002E164 24020200 */ addiu $v0, $zero, 0x200
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/* 9568 8002E168 A46500BA */ sh $a1, 0xba($v1)
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/* 956C 8002E16C A46200BC */ sh $v0, 0xbc($v1)
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/* 9570 8002E170 03E00008 */ jr $ra
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/* 9574 8002E174 A46000BE */ sh $zero, 0xbe($v1)
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