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40 lines
1.7 KiB
ArmAsm
40 lines
1.7 KiB
ArmAsm
.include "macro.inc"
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# assembler directives
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.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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.set gp=64 # allow use of 64-bit general purpose registers
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.section .text, "ax"
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glabel __osDisableInt
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/* 46760 8006B360 3C0A8009 */ lui $t2, 0x8009
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/* 46764 8006B364 254A5900 */ addiu $t2, $t2, 0x5900
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/* 46768 8006B368 8D4B0000 */ lw $t3, ($t2)
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/* 4676C 8006B36C 316BFF00 */ andi $t3, $t3, 0xff00
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/* 46770 8006B370 40086000 */ mfc0 $t0, $12
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/* 46774 8006B374 2401FFFE */ addiu $at, $zero, -2
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/* 46778 8006B378 01014824 */ and $t1, $t0, $at
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/* 4677C 8006B37C 40896000 */ mtc0 $t1, $12
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/* 46780 8006B380 31020001 */ andi $v0, $t0, 1
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/* 46784 8006B384 8D480000 */ lw $t0, ($t2)
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/* 46788 8006B388 3108FF00 */ andi $t0, $t0, 0xff00
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/* 4678C 8006B38C 110B000E */ beq $t0, $t3, .L8006B3C8
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/* 46790 8006B390 3C0A8009 */ lui $t2, 0x8009
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/* 46794 8006B394 254A4660 */ addiu $t2, $t2, 0x4660
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/* 46798 8006B398 8D490118 */ lw $t1, 0x118($t2)
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/* 4679C 8006B39C 312AFF00 */ andi $t2, $t1, 0xff00
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/* 467A0 8006B3A0 01485024 */ and $t2, $t2, $t0
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/* 467A4 8006B3A4 3C01FFFF */ lui $at, 0xffff
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/* 467A8 8006B3A8 342100FF */ ori $at, $at, 0xff
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/* 467AC 8006B3AC 01214824 */ and $t1, $t1, $at
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/* 467B0 8006B3B0 012A4825 */ or $t1, $t1, $t2
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/* 467B4 8006B3B4 2401FFFE */ addiu $at, $zero, -2
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/* 467B8 8006B3B8 01214824 */ and $t1, $t1, $at
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/* 467BC 8006B3BC 40896000 */ mtc0 $t1, $12
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/* 467C0 8006B3C0 00000000 */ nop
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/* 467C4 8006B3C4 00000000 */ nop
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.L8006B3C8:
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/* 467C8 8006B3C8 03E00008 */ jr $ra
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/* 467CC 8006B3CC 00000000 */ nop
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