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50 lines
2.4 KiB
ArmAsm
50 lines
2.4 KiB
ArmAsm
.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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glabel queue_render_task
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/* B4010 8011D910 3C028015 */ lui $v0, %hi(D_801533AC)
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/* B4014 8011D914 8C4233AC */ lw $v0, %lo(D_801533AC)($v0)
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/* B4018 8011D918 3C038015 */ lui $v1, %hi(D_801533B0)
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/* B401C 8011D91C 8C6333B0 */ lw $v1, %lo(D_801533B0)($v1)
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/* B4020 8011D920 00021080 */ sll $v0, $v0, 2
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/* B4024 8011D924 28630100 */ slti $v1, $v1, 0x100
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/* B4028 8011D928 3C058015 */ lui $a1, %hi(D_801533A0)
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/* B402C 8011D92C 00A22821 */ addu $a1, $a1, $v0
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/* B4030 8011D930 8CA533A0 */ lw $a1, %lo(D_801533A0)($a1)
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/* B4034 8011D934 14600003 */ bnez $v1, .L8011D944
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/* B4038 8011D938 0080302D */ daddu $a2, $a0, $zero
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.L8011D93C:
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/* B403C 8011D93C 0804764F */ j .L8011D93C
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/* B4040 8011D940 00000000 */ nop
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.L8011D944:
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/* B4044 8011D944 3C048015 */ lui $a0, %hi(D_801533B0)
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/* B4048 8011D948 248433B0 */ addiu $a0, $a0, %lo(D_801533B0)
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/* B404C 8011D94C 8C820000 */ lw $v0, ($a0)
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/* B4050 8011D950 00021900 */ sll $v1, $v0, 4
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/* B4054 8011D954 00A32821 */ addu $a1, $a1, $v1
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/* B4058 8011D958 24420001 */ addiu $v0, $v0, 1
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/* B405C 8011D95C AC820000 */ sw $v0, ($a0)
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/* B4060 8011D960 24020001 */ addiu $v0, $zero, 1
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/* B4064 8011D964 ACA20000 */ sw $v0, ($a1)
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/* B4068 8011D968 8CC30000 */ lw $v1, ($a2)
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/* B406C 8011D96C 2402002D */ addiu $v0, $zero, 0x2d
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/* B4070 8011D970 14620003 */ bne $v1, $v0, .L8011D980
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/* B4074 8011D974 00000000 */ nop
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/* B4078 8011D978 24020021 */ addiu $v0, $zero, 0x21
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/* B407C 8011D97C ACA20000 */ sw $v0, ($a1)
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.L8011D980:
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/* B4080 8011D980 8CC20008 */ lw $v0, 8($a2)
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/* B4084 8011D984 ACA20008 */ sw $v0, 8($a1)
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/* B4088 8011D988 8CC2000C */ lw $v0, 0xc($a2)
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/* B408C 8011D98C ACA2000C */ sw $v0, 0xc($a1)
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/* B4090 8011D990 8CC20000 */ lw $v0, ($a2)
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/* B4094 8011D994 8CC30004 */ lw $v1, 4($a2)
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/* B4098 8011D998 00021080 */ sll $v0, $v0, 2
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/* B409C 8011D99C 3C018015 */ lui $at, %hi(D_8014C188)
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/* B40A0 8011D9A0 00220821 */ addu $at, $at, $v0
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/* B40A4 8011D9A4 8C22C188 */ lw $v0, %lo(D_8014C188)($at)
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/* B40A8 8011D9A8 00431023 */ subu $v0, $v0, $v1
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/* B40AC 8011D9AC ACA20004 */ sw $v0, 4($a1)
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/* B40B0 8011D9B0 03E00008 */ jr $ra
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/* B40B4 8011D9B4 00A0102D */ daddu $v0, $a1, $zero
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