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llvm-mirror/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll

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Eliminate more uses of llvm-as and llvm-dis. llvm-svn: 81293
2009-09-09 02:09:15 +02:00
; RUN: llc < %s -mtriple=thumbv7-none-linux-gnueabi | FileCheck %s
It turns out most of the thumb2 instructions are not allowed to touch SP. The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing. This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time. This fixes PR4659 and PR4682. llvm-svn: 78361
2009-08-07 02:34:42 +02:00
; PR4659
; PR4682
Remove the arm_aapcscc marker from the tests. It is the default for the linux targets. llvm-svn: 106029
2010-06-15 21:04:29 +02:00
define hidden i32 @__gcov_execlp(i8* %path, i8* %arg, ...) nounwind {
It turns out most of the thumb2 instructions are not allowed to touch SP. The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing. This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time. This fixes PR4659 and PR4682. llvm-svn: 78361
2009-08-07 02:34:42 +02:00
entry:
; CHECK: __gcov_execlp:
Fix epilogue codegen to avoid leaving the stack pointer in an invalid state. Previously Thumb2 would restore sp from fp like this: mov sp, r7 sub, sp, #4 If an interrupt is taken after the 'mov' but before the 'sub', callee-saved registers might be clobbered by the interrupt handler. Instead, try restoring directly from sp: add sp, #4 Or, if necessary (with VLA, etc.) use a scratch register to compute sp and then restore it: sub.w r4, r7, #8 mov sp, r7 rdar://8465407 llvm-svn: 119977
2010-11-22 19:12:04 +01:00
; CHECK: sub sp, #8
; CHECK: push
; CHECK: add r7, sp, #4
Roll r127459 back in: Optimize trivial branches in CodeGenPrepare, which often get created from the lowering of objectsize intrinsics. Unfortunately, a number of tests were relying on llc not optimizing trivial branches, so I had to add an option to allow them to continue to test what they originally tested. This fixes <rdar://problem/8785296> and <rdar://problem/9112893>. llvm-svn: 127498
2011-03-11 22:52:04 +01:00
; CHECK: sub.w r4, r7, #4
Fix epilogue codegen to avoid leaving the stack pointer in an invalid state. Previously Thumb2 would restore sp from fp like this: mov sp, r7 sub, sp, #4 If an interrupt is taken after the 'mov' but before the 'sub', callee-saved registers might be clobbered by the interrupt handler. Instead, try restoring directly from sp: add sp, #4 Or, if necessary (with VLA, etc.) use a scratch register to compute sp and then restore it: sub.w r4, r7, #8 mov sp, r7 rdar://8465407 llvm-svn: 119977
2010-11-22 19:12:04 +01:00
; CHECK: mov sp, r4
; CHECK-NOT: mov sp, r7
; CHECK: add sp, #8
Remove the arm_aapcscc marker from the tests. It is the default for the linux targets. llvm-svn: 106029
2010-06-15 21:04:29 +02:00
call void @__gcov_flush() nounwind
It turns out most of the thumb2 instructions are not allowed to touch SP. The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing. This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time. This fixes PR4659 and PR4682. llvm-svn: 78361
2009-08-07 02:34:42 +02:00
br i1 undef, label %bb5, label %bb
bb: ; preds = %bb, %entry
br i1 undef, label %bb5, label %bb
bb5: ; preds = %bb, %entry
%0 = alloca i8*, i32 undef, align 4 ; <i8**> [#uses=1]
Remove the arm_aapcscc marker from the tests. It is the default for the linux targets. llvm-svn: 106029
2010-06-15 21:04:29 +02:00
%1 = call i32 @execvp(i8* %path, i8** %0) nounwind ; <i32> [#uses=1]
It turns out most of the thumb2 instructions are not allowed to touch SP. The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing. This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time. This fixes PR4659 and PR4682. llvm-svn: 78361
2009-08-07 02:34:42 +02:00
ret i32 %1
}
Remove the arm_aapcscc marker from the tests. It is the default for the linux targets. llvm-svn: 106029
2010-06-15 21:04:29 +02:00
declare hidden void @__gcov_flush()
It turns out most of the thumb2 instructions are not allowed to touch SP. The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing. This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time. This fixes PR4659 and PR4682. llvm-svn: 78361
2009-08-07 02:34:42 +02:00
Remove the arm_aapcscc marker from the tests. It is the default for the linux targets. llvm-svn: 106029
2010-06-15 21:04:29 +02:00
declare i32 @execvp(i8*, i8**) nounwind
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