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llvm-mirror/test/Transforms/InstCombine/assume2.ll

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Add additional patterns for @llvm.assume in ValueTracking This builds on r217342, which added the infrastructure to compute known bits using assumptions (@llvm.assume calls). That original commit added only a few patterns (to catch common cases related to determining pointer alignment); this change adds several other patterns for simple cases. r217342 contained that, for assume(v & b = a), bits in the mask that are known to be one, we can propagate known bits from the a to v. It also had a known-bits transfer for assume(a = b). This patch adds: assume(~(v & b) = a) : For those bits in the mask that are known to be one, we can propagate inverted known bits from the a to v. assume(v | b = a) : For those bits in b that are known to be zero, we can propagate known bits from the a to v. assume(~(v | b) = a): For those bits in b that are known to be zero, we can propagate inverted known bits from the a to v. assume(v ^ b = a) : For those bits in b that are known to be zero, we can propagate known bits from the a to v. For those bits in b that are known to be one, we can propagate inverted known bits from the a to v. assume(~(v ^ b) = a) : For those bits in b that are known to be zero, we can propagate inverted known bits from the a to v. For those bits in b that are known to be one, we can propagate known bits from the a to v. assume(v << c = a) : For those bits in a that are known, we can propagate them to known bits in v shifted to the right by c. assume(~(v << c) = a) : For those bits in a that are known, we can propagate them inverted to known bits in v shifted to the right by c. assume(v >> c = a) : For those bits in a that are known, we can propagate them to known bits in v shifted to the right by c. assume(~(v >> c) = a) : For those bits in a that are known, we can propagate them inverted to known bits in v shifted to the right by c. assume(v >=_s c) where c is non-negative: The sign bit of v is zero assume(v >_s c) where c is at least -1: The sign bit of v is zero assume(v <=_s c) where c is negative: The sign bit of v is one assume(v <_s c) where c is non-positive: The sign bit of v is one assume(v <=_u c): Transfer the known high zero bits assume(v <_u c): Transfer the known high zero bits (if c is know to be a power of 2, transfer one more) A small addition to InstCombine was necessary for some of the test cases. The problem is that when InstCombine was simplifying and, or, etc. it would fail to check the 'do I know all of the bits' condition before checking less specific conditions and would not fully constant-fold the result. I'm not sure how to trigger this aside from using assumptions, so I've just included the change here. llvm-svn: 217343
2014-09-07 21:21:07 +02:00
; RUN: opt < %s -instcombine -S | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind
declare void @llvm.assume(i1) #1
; Function Attrs: nounwind uwtable
define i32 @test1(i32 %a) #0 {
entry:
; CHECK-LABEL: @test1
; CHECK: call void @llvm.assume
; CHECK: ret i32 5
%and = and i32 %a, 15
%cmp = icmp eq i32 %and, 5
tail call void @llvm.assume(i1 %cmp)
%and1 = and i32 %a, 7
ret i32 %and1
}
; Function Attrs: nounwind uwtable
define i32 @test2(i32 %a) #0 {
entry:
; CHECK-LABEL: @test2
; CHECK: call void @llvm.assume
; CHECK: ret i32 2
%and = and i32 %a, 15
%nand = xor i32 %and, -1
%cmp = icmp eq i32 %nand, 4294967285
tail call void @llvm.assume(i1 %cmp)
%and1 = and i32 %a, 7
ret i32 %and1
}
; Function Attrs: nounwind uwtable
define i32 @test3(i32 %a) #0 {
entry:
; CHECK-LABEL: @test3
; CHECK: call void @llvm.assume
; CHECK: ret i32 5
%v = or i32 %a, 4294967280
%cmp = icmp eq i32 %v, 4294967285
tail call void @llvm.assume(i1 %cmp)
%and1 = and i32 %a, 7
ret i32 %and1
}
; Function Attrs: nounwind uwtable
define i32 @test4(i32 %a) #0 {
entry:
; CHECK-LABEL: @test4
; CHECK: call void @llvm.assume
; CHECK: ret i32 2
%v = or i32 %a, 4294967280
%nv = xor i32 %v, -1
%cmp = icmp eq i32 %nv, 5
tail call void @llvm.assume(i1 %cmp)
%and1 = and i32 %a, 7
ret i32 %and1
}
; Function Attrs: nounwind uwtable
define i32 @test5(i32 %a) #0 {
entry:
; CHECK-LABEL: @test5
; CHECK: call void @llvm.assume
; CHECK: ret i32 4
%v = xor i32 %a, 1
%cmp = icmp eq i32 %v, 5
tail call void @llvm.assume(i1 %cmp)
%and1 = and i32 %a, 7
ret i32 %and1
}
; Function Attrs: nounwind uwtable
define i32 @test6(i32 %a) #0 {
entry:
; CHECK-LABEL: @test6
; CHECK: call void @llvm.assume
; CHECK: ret i32 5
%v = shl i32 %a, 2
%cmp = icmp eq i32 %v, 20
tail call void @llvm.assume(i1 %cmp)
%and1 = and i32 %a, 63
ret i32 %and1
}
; Function Attrs: nounwind uwtable
define i32 @test7(i32 %a) #0 {
entry:
; CHECK-LABEL: @test7
; CHECK: call void @llvm.assume
; CHECK: ret i32 20
%v = lshr i32 %a, 2
%cmp = icmp eq i32 %v, 5
tail call void @llvm.assume(i1 %cmp)
%and1 = and i32 %a, 252
ret i32 %and1
}
; Function Attrs: nounwind uwtable
define i32 @test8(i32 %a) #0 {
entry:
; CHECK-LABEL: @test8
; CHECK: call void @llvm.assume
; CHECK: ret i32 20
%v = lshr i32 %a, 2
%cmp = icmp eq i32 %v, 5
tail call void @llvm.assume(i1 %cmp)
%and1 = and i32 %a, 252
ret i32 %and1
}
; Function Attrs: nounwind uwtable
define i32 @test9(i32 %a) #0 {
entry:
; CHECK-LABEL: @test9
; CHECK: call void @llvm.assume
; CHECK: ret i32 0
%cmp = icmp sgt i32 %a, 5
tail call void @llvm.assume(i1 %cmp)
%and1 = and i32 %a, 2147483648
ret i32 %and1
}
; Function Attrs: nounwind uwtable
define i32 @test10(i32 %a) #0 {
entry:
; CHECK-LABEL: @test10
; CHECK: call void @llvm.assume
; CHECK: ret i32 -2147483648
%cmp = icmp sle i32 %a, -2
tail call void @llvm.assume(i1 %cmp)
%and1 = and i32 %a, 2147483648
ret i32 %and1
}
; Function Attrs: nounwind uwtable
define i32 @test11(i32 %a) #0 {
entry:
; CHECK-LABEL: @test11
; CHECK: call void @llvm.assume
; CHECK: ret i32 0
%cmp = icmp ule i32 %a, 256
tail call void @llvm.assume(i1 %cmp)
%and1 = and i32 %a, 3072
ret i32 %and1
}
attributes #0 = { nounwind uwtable }
attributes #1 = { nounwind }
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