llvm-mirror/test/CodeGen/NVPTX/implicit-def.ll

; RUN: llc < %s -O0 -march=nvptx -mcpu=sm_20 -asm-verbose=1 | FileCheck %s

; CHECK: // implicit-def: %f[[F0:[0-9]+]]
; CHECK: add.rn.f32         %f{{[0-9]+}}, %f{{[0-9]+}}, %f[[F0]];
define float @foo(float %a) {
  %ret = fadd float %a, undef
  ret float %ret
}
Make AsmPrinter::emitImplicitDef a virtual method so targets can emit custom comments for implicit defs For NVPTX, this fixes a crash where the emitImplicitDef implementation was expecting physical registers, while NVPTX uses virtual registers (with a couple of exceptions). Now, the implicit def comment will be emitted as a true PTX register name. Other targets can use this to customize the output of implicit def comments. Fixes PR17519 llvm-svn: 192444 2013-10-11 14:39:36 +02:00			`; RUN: llc < %s -O0 -march=nvptx -mcpu=sm_20 -asm-verbose=1 \| FileCheck %s`

			`; CHECK: // implicit-def: %f[[F0:[0-9]+]]`
[NVPTX] Improve handling of FP fusion We now consider the FPOpFusion flag when determining whether to fuse ops. We also explicitly emit add.rn when fusion is disabled to prevent ptxas from fusing the operations on its own. llvm-svn: 213287 2014-07-17 20:10:09 +02:00			`; CHECK: add.rn.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f[[F0]];`
Make AsmPrinter::emitImplicitDef a virtual method so targets can emit custom comments for implicit defs For NVPTX, this fixes a crash where the emitImplicitDef implementation was expecting physical registers, while NVPTX uses virtual registers (with a couple of exceptions). Now, the implicit def comment will be emitted as a true PTX register name. Other targets can use this to customize the output of implicit def comments. Fixes PR17519 llvm-svn: 192444 2013-10-11 14:39:36 +02:00			`define float @foo(float %a) {`
			`%ret = fadd float %a, undef`
			`ret float %ret`
			`}`