llvm-mirror/test/CodeGen/SystemZ/tls-11.mir

# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z196 -O0 -start-before=prologepilog \
# RUN:   -o - %s | FileCheck %s
#
# Test that a COPY to CC gets implemented with a tmlh or tmhh depending on
# the source register.

---
name:            fun0
tracksRegLiveness: true
body:             |
  bb.0:
  liveins: $r3l, $r4h
    ; CHECK-LABEL: fun0
    ; CHECK: tmlh %r3, 12288
    ; CHECK: tmhh %r4, 12288
    $cc = COPY $r3l
    $cc = COPY $r4h
...
[SystemZ] Copy Access registers and CC with the correct register class. On SystemZ there are a set of "access registers" that can be copied in and out of 32-bit GPRs with special instructions. These instructions can only perform the copy using low 32-bit parts of the 64-bit GPRs. However, the default register class for 32-bit integers is GRX32, which also contains the high 32-bit part registers. In order to never end up with a case of such a COPY into a high reg, this patch adds a new simple pre-RA pass that selects such COPYs into target instructions. This pass also handles COPYs from CC (Condition Code register), and COPYs to CC can now also be emitted from a high reg in copyPhysReg(). Fixes: https://bugs.llvm.org/show_bug.cgi?id=44254 Review: Ulrich Weigand. Differential Revision: https://reviews.llvm.org/D75014 2020-02-21 02:42:51 +01:00			`# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z196 -O0 -start-before=prologepilog \`
			`# RUN: -o - %s \| FileCheck %s`
			`#`
			`# Test that a COPY to CC gets implemented with a tmlh or tmhh depending on`
			`# the source register.`

			`---`
			`name: fun0`
			`tracksRegLiveness: true`
			`body: \|`
			`bb.0:`
			`liveins: $r3l, $r4h`
			`; CHECK-LABEL: fun0`
			`; CHECK: tmlh %r3, 12288`
			`; CHECK: tmhh %r4, 12288`
			`$cc = COPY $r3l`
			`$cc = COPY $r4h`
			`...`