mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-25 12:12:47 +01:00
92dfdbb7d5
On SystemZ there are a set of "access registers" that can be copied in and out of 32-bit GPRs with special instructions. These instructions can only perform the copy using low 32-bit parts of the 64-bit GPRs. However, the default register class for 32-bit integers is GRX32, which also contains the high 32-bit part registers. In order to never end up with a case of such a COPY into a high reg, this patch adds a new simple pre-RA pass that selects such COPYs into target instructions. This pass also handles COPYs from CC (Condition Code register), and COPYs to CC can now also be emitted from a high reg in copyPhysReg(). Fixes: https://bugs.llvm.org/show_bug.cgi?id=44254 Review: Ulrich Weigand. Differential Revision: https://reviews.llvm.org/D75014
19 lines
439 B
YAML
19 lines
439 B
YAML
# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z196 -O0 -start-before=prologepilog \
|
|
# RUN: -o - %s | FileCheck %s
|
|
#
|
|
# Test that a COPY to CC gets implemented with a tmlh or tmhh depending on
|
|
# the source register.
|
|
|
|
---
|
|
name: fun0
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
liveins: $r3l, $r4h
|
|
; CHECK-LABEL: fun0
|
|
; CHECK: tmlh %r3, 12288
|
|
; CHECK: tmhh %r4, 12288
|
|
$cc = COPY $r3l
|
|
$cc = COPY $r4h
|
|
...
|