2012-09-18 23:24:16 +02:00
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; RUN: llc -march=arm -mcpu=cortex-a8 < %s | FileCheck %s
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2010-07-14 19:45:16 +02:00
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; 171 = 0x000000ab
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define i64 @f1(i64 %a) {
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; CHECK: f1
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; CHECK: subs r0, r0, #171
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; CHECK: sbc r1, r1, #0
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%tmp = sub i64 %a, 171
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ret i64 %tmp
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}
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; 66846720 = 0x03fc0000
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define i64 @f2(i64 %a) {
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; CHECK: f2
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2011-07-11 18:48:36 +02:00
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; CHECK: subs r0, r0, #66846720
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2010-07-14 19:45:16 +02:00
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; CHECK: sbc r1, r1, #0
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%tmp = sub i64 %a, 66846720
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ret i64 %tmp
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}
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; 734439407618 = 0x000000ab00000002
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define i64 @f3(i64 %a) {
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; CHECK: f3
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; CHECK: subs r0, r0, #2
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; CHECK: sbc r1, r1, #171
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%tmp = sub i64 %a, 734439407618
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ret i64 %tmp
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}
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2011-04-07 01:35:59 +02:00
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define i32 @f4(i32 %x) {
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entry:
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; CHECK: f4
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; CHECK: rsbs
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%sub = sub i32 1, %x
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%cmp = icmp ugt i32 %sub, 0
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%sel = select i1 %cmp, i32 1, i32 %sub
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ret i32 %sel
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}
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2012-06-23 02:29:06 +02:00
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; rdar://11726136
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define i32 @f5(i32 %x) {
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entry:
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; CHECK: f5
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; CHECK: movw r1, #65535
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; CHECK-NOT: movt
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; CHECK-NOT: add
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; CHECK: sub r0, r0, r1
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%sub = add i32 %x, -65535
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ret i32 %sub
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}
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