2017-11-21 14:49:13 +00:00
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S -data-layout="e-m:e-i64:64-f80:128-n8:16:32:64-S128" | FileCheck %s
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@a = global [1000 x float] zeroinitializer, align 16
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@b = global [1000 x float] zeroinitializer, align 16
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define void @_Z3foov() {
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; CHECK-LABEL: @_Z3foov(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[I_0]], 1000
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
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; CHECK: for.cond.cleanup:
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; CHECK-NEXT: ret void
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; CHECK: for.body:
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; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[I_0]] to i64
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x float], [1000 x float]* @a, i64 0, i64 [[TMP0]]
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; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [1000 x float], [1000 x float]* @b, i64 0, i64 [[TMP0]]
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; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[TMP2:%.*]] = load float, float* [[ARRAYIDX2]], align 4
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; CHECK-NEXT: [[CMP_I:%.*]] = fcmp fast olt float [[TMP1]], [[TMP2]]
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[InstCombine] PR35354: Convert store(bitcast, load bitcast (select (Cond, &V1, &V2)) --> store (, load (select(Cond, load &V1, load &V2)))
Summary:
If we have the code like this:
```
float a, b;
a = std::max(a ,b);
```
it is converted into something like this:
```
%call = call dereferenceable(4) float* @_ZSt3maxIfERKT_S2_S2_(float* nonnull dereferenceable(4) %a.addr, float* nonnull dereferenceable(4) %b.addr)
%1 = bitcast float* %call to i32*
%2 = load i32, i32* %1, align 4
%3 = bitcast float* %a.addr to i32*
store i32 %2, i32* %3, align 4
```
After inlinning this code is converted to the next:
```
%1 = load float, float* %a.addr
%2 = load float, float* %b.addr
%cmp.i = fcmp fast olt float %1, %2
%__b.__a.i = select i1 %cmp.i, float* %a.addr, float* %b.addr
%3 = bitcast float* %__b.__a.i to i32*
%4 = load i32, i32* %3, align 4
%5 = bitcast float* %arrayidx to i32*
store i32 %4, i32* %5, align 4
```
This pattern is not recognized as minmax pattern.
Patch solves this problem by converting sequence
```
store (bitcast, (load bitcast (select ((cmp V1, V2), &V1, &V2))))
```
to a sequence
```
store (,load (select((cmp V1, V2), &V1, &V2)))
```
After this the code is recognized as minmax pattern.
Reviewers: RKSimon, spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40304
llvm-svn: 320157
2017-12-08 15:32:10 +00:00
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; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[CMP_I]], float [[TMP2]], float [[TMP1]]
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; CHECK-NEXT: store float [[TMP3]], float* [[ARRAYIDX]], align 4
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2017-11-21 14:49:13 +00:00
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; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_0]], 1
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; CHECK-NEXT: br label [[FOR_COND]]
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;
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entry:
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br label %for.cond
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for.cond: ; preds = %for.body, %entry
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%i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%cmp = icmp ult i32 %i.0, 1000
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br i1 %cmp, label %for.body, label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.cond
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ret void
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for.body: ; preds = %for.cond
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%0 = zext i32 %i.0 to i64
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%arrayidx = getelementptr inbounds [1000 x float], [1000 x float]* @a, i64 0, i64 %0
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%arrayidx2 = getelementptr inbounds [1000 x float], [1000 x float]* @b, i64 0, i64 %0
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%1 = load float, float* %arrayidx, align 4
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%2 = load float, float* %arrayidx2, align 4
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%cmp.i = fcmp fast olt float %1, %2
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%__b.__a.i = select i1 %cmp.i, float* %arrayidx2, float* %arrayidx
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%3 = bitcast float* %__b.__a.i to i32*
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%4 = load i32, i32* %3, align 4
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%5 = bitcast float* %arrayidx to i32*
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store i32 %4, i32* %5, align 4
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%inc = add nuw nsw i32 %i.0, 1
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br label %for.cond
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}
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2017-11-28 20:48:24 +00:00
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define i32 @store_bitcasted_load(i1 %cond, float* dereferenceable(4) %addr1, float* dereferenceable(4) %addr2) {
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; CHECK-LABEL: @store_bitcasted_load(
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], float* [[ADDR1:%.*]], float* [[ADDR2:%.*]]
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; CHECK-NEXT: [[BC1:%.*]] = bitcast float* [[SEL]] to i32*
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; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[BC1]], align 4
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; CHECK-NEXT: ret i32 [[LD]]
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;
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%sel = select i1 %cond, float* %addr1, float* %addr2
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%bc1 = bitcast float* %sel to i32*
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%ld = load i32, i32* %bc1
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ret i32 %ld
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}
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2017-11-30 14:33:58 +00:00
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define void @bitcasted_store(i1 %cond, float* %loadaddr1, float* %loadaddr2, float* %storeaddr) {
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; CHECK-LABEL: @bitcasted_store(
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], float* [[LOADADDR1:%.*]], float* [[LOADADDR2:%.*]]
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; CHECK-NEXT: [[INT_LOAD_ADDR:%.*]] = bitcast float* [[SEL]] to i32*
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; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[INT_LOAD_ADDR]], align 4
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; CHECK-NEXT: [[INT_STORE_ADDR:%.*]] = bitcast float* [[STOREADDR:%.*]] to i32*
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; CHECK-NEXT: store i32 [[LD]], i32* [[INT_STORE_ADDR]], align 4
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; CHECK-NEXT: ret void
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;
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%sel = select i1 %cond, float* %loadaddr1, float* %loadaddr2
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%int_load_addr = bitcast float* %sel to i32*
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%ld = load i32, i32* %int_load_addr
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%int_store_addr = bitcast float* %storeaddr to i32*
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store i32 %ld, i32* %int_store_addr
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ret void
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}
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2017-12-05 16:15:55 +00:00
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define void @bitcasted_minmax_with_select_of_pointers(float* %loadaddr1, float* %loadaddr2, float* %storeaddr) {
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; CHECK-LABEL: @bitcasted_minmax_with_select_of_pointers(
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; CHECK-NEXT: [[LD1:%.*]] = load float, float* [[LOADADDR1:%.*]], align 4
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; CHECK-NEXT: [[LD2:%.*]] = load float, float* [[LOADADDR2:%.*]], align 4
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; CHECK-NEXT: [[COND:%.*]] = fcmp ogt float [[LD1]], [[LD2]]
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[InstCombine] PR35354: Convert store(bitcast, load bitcast (select (Cond, &V1, &V2)) --> store (, load (select(Cond, load &V1, load &V2)))
Summary:
If we have the code like this:
```
float a, b;
a = std::max(a ,b);
```
it is converted into something like this:
```
%call = call dereferenceable(4) float* @_ZSt3maxIfERKT_S2_S2_(float* nonnull dereferenceable(4) %a.addr, float* nonnull dereferenceable(4) %b.addr)
%1 = bitcast float* %call to i32*
%2 = load i32, i32* %1, align 4
%3 = bitcast float* %a.addr to i32*
store i32 %2, i32* %3, align 4
```
After inlinning this code is converted to the next:
```
%1 = load float, float* %a.addr
%2 = load float, float* %b.addr
%cmp.i = fcmp fast olt float %1, %2
%__b.__a.i = select i1 %cmp.i, float* %a.addr, float* %b.addr
%3 = bitcast float* %__b.__a.i to i32*
%4 = load i32, i32* %3, align 4
%5 = bitcast float* %arrayidx to i32*
store i32 %4, i32* %5, align 4
```
This pattern is not recognized as minmax pattern.
Patch solves this problem by converting sequence
```
store (bitcast, (load bitcast (select ((cmp V1, V2), &V1, &V2))))
```
to a sequence
```
store (,load (select((cmp V1, V2), &V1, &V2)))
```
After this the code is recognized as minmax pattern.
Reviewers: RKSimon, spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40304
llvm-svn: 320157
2017-12-08 15:32:10 +00:00
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; CHECK-NEXT: [[LD3:%.*]] = select i1 [[COND]], float [[LD1]], float [[LD2]]
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; CHECK-NEXT: store float [[LD3]], float* [[STOREADDR:%.*]], align 4
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2017-12-05 16:15:55 +00:00
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; CHECK-NEXT: ret void
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;
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%ld1 = load float, float* %loadaddr1, align 4
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%ld2 = load float, float* %loadaddr2, align 4
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%cond = fcmp ogt float %ld1, %ld2
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%sel = select i1 %cond, float* %loadaddr1, float* %loadaddr2
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%int_load_addr = bitcast float* %sel to i32*
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%ld = load i32, i32* %int_load_addr, align 4
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%int_store_addr = bitcast float* %storeaddr to i32*
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store i32 %ld, i32* %int_store_addr, align 4
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ret void
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}
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