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llvm-mirror/test/CodeGen/AArch64/pr49781.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=aarch64 -mattr=+sve | FileCheck %s
define <vscale x 2 x i64> @foo(<vscale x 2 x i64> %a) {
; CHECK-LABEL: foo:
; CHECK: // %bb.0:
; CHECK-NEXT: sub z0.d, z0.d, #2 // =0x2
; CHECK-NEXT: ret
%idx = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 1, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
%b = sub <vscale x 2 x i64> %a, %idx
%c = sub <vscale x 2 x i64> %b, %idx
ret <vscale x 2 x i64> %c
}