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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 10:42:39 +01:00
llvm-mirror/test/CodeGen
Johannes Doerfert 35ac57a3f1 [Attributor] Update check lines for all AMDGPU attributor tests
I thought there was only one when I pushed
cdb4cfe8b3ce2b0c50d4855ec260eab07fe63611, these should be all (in the
CodeGen/AMDGPU folder).
2021-07-27 00:55:26 -05:00
..
AArch64 Revert "[GlobalISel] Add scalar widening for G_MERGE_VALUES destination" 2021-07-26 19:52:12 -07:00
AMDGPU [Attributor] Update check lines for all AMDGPU attributor tests 2021-07-27 00:55:26 -05:00
ARC
ARM [Local] Do not introduce a new llvm.trap before unreachable 2021-07-26 23:33:36 -05:00
AVR [AVR] Only support sp, r0 and r1 in llvm.read_register 2021-07-24 14:03:27 +02:00
BPF [BPF] Use elementtype attribute for preserve.array/struct.index intrinsics 2021-07-17 11:09:18 +02:00
Generic [PowerPC] Add pwr7 and pwr10 support to IBM MASSV pass on AIX 2021-07-26 23:21:38 +00:00
Hexagon [Local] Do not introduce a new llvm.trap before unreachable 2021-07-26 23:33:36 -05:00
Inputs
Lanai
M68k [M68k][GloballSel] LegalizerInfo implementation 2021-07-15 13:00:43 -06:00
Mips [llvm][sve] Lowering for VLS truncating stores 2021-07-23 14:04:55 +01:00
MIR
MSP430
NVPTX [NVPTX] Add select(cc,binop(),binop()) fast-math tests 2021-07-18 15:30:24 +01:00
PowerPC [PowerPC] Fix materialization of SP float values on Power10 2021-07-26 19:43:10 -05:00
RISCV [SelectionDAG] Support scalable-vector splats in yet more cases 2021-07-26 10:15:08 +01:00
SPARC
SystemZ [SystemZ] Add support for new cpu architecture - arch14 2021-07-26 16:57:28 +02:00
Thumb
Thumb2 [Local] Do not introduce a new llvm.trap before unreachable 2021-07-26 23:33:36 -05:00
VE
WebAssembly [WebAssembly] Make Emscripten EH work with Emscripten SjLj 2021-07-26 13:48:31 -07:00
WinCFGuard
WinEH
X86 [X86][AVX] Add PR50053 test case 2021-07-26 17:57:38 +01:00
XCore