llvm-mirror/docs/AMDGPU/gfx10_bimm32.rst

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.. _amdgpu_synid10_bimm32:

imm32
===========================

An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value is truncated to 32 bits.
[AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. Summary of changes: - added description of GFX10; - added description of operands sccz, vccz, lds_direct, etc; - minor bugfixing and improvements. llvm-svn: 365347 2019-07-08 18:50:11 +02:00			`..`
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			`.. _amdgpu_synid10_bimm32:`

			`imm32`
			`===========================`

[AMDGPU][MC][DOC] Updated AMD GPU assembler description. Summary of changes: - Updated to reflect recent changes in assembler; - Minor bugfixing and improvements. llvm-svn: 372857 2019-09-25 14:38:35 +02:00			An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value is truncated to 32 bits.