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llvm-mirror/test/CodeGen/PowerPC/testComparesiequi.ll

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[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
; ModuleID = 'ComparisonTestCases/testComparesiequi.c'
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
@glob = dso_local local_unnamed_addr global i32 0, align 4
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; Function Attrs: norecurse nounwind readnone
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
define dso_local signext i32 @test_iequi(i32 zeroext %a, i32 zeroext %b) {
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-LABEL: test_iequi:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-04 18:18:51 +01:00
; CHECK: # %bb.0: # %entry
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: xor r3, r3, r4
; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: blr
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-LABEL: test_iequi:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: xor r3, r3, r4
; CHECK-BE-NEXT: cntlzw r3, r3
; CHECK-BE-NEXT: srwi r3, r3, 5
; CHECK-BE-NEXT: blr
;
; CHECK-LE-LABEL: test_iequi:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: xor r3, r3, r4
; CHECK-LE-NEXT: cntlzw r3, r3
; CHECK-LE-NEXT: srwi r3, r3, 5
; CHECK-LE-NEXT: blr
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
entry:
%cmp = icmp eq i32 %a, %b
%conv = zext i1 %cmp to i32
ret i32 %conv
}
; Function Attrs: norecurse nounwind readnone
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
define dso_local signext i32 @test_iequi_sext(i32 zeroext %a, i32 zeroext %b) {
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-LABEL: test_iequi_sext:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-04 18:18:51 +01:00
; CHECK: # %bb.0: # %entry
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: xor r3, r3, r4
; CHECK-NEXT: cntlzw r3, r3
Recommit r310809 with a fix for the spill problem This patch re-commits the patch that was pulled out due to a problem it caused, but with a fix for the problem. The fix was reviewed separately by Eric Christopher and Hal Finkel. Differential Revision: https://reviews.llvm.org/D38054 llvm-svn: 313978
2017-09-22 13:50:25 +02:00
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: neg r3, r3
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: blr
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-LABEL: test_iequi_sext:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: xor r3, r3, r4
; CHECK-BE-NEXT: cntlzw r3, r3
; CHECK-BE-NEXT: srwi r3, r3, 5
; CHECK-BE-NEXT: neg r3, r3
; CHECK-BE-NEXT: blr
;
; CHECK-LE-LABEL: test_iequi_sext:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: xor r3, r3, r4
; CHECK-LE-NEXT: cntlzw r3, r3
; CHECK-LE-NEXT: srwi r3, r3, 5
; CHECK-LE-NEXT: neg r3, r3
; CHECK-LE-NEXT: blr
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
entry:
%cmp = icmp eq i32 %a, %b
%sub = sext i1 %cmp to i32
ret i32 %sub
}
; Function Attrs: norecurse nounwind readnone
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
define dso_local signext i32 @test_iequi_z(i32 zeroext %a) {
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-LABEL: test_iequi_z:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-04 18:18:51 +01:00
; CHECK: # %bb.0: # %entry
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: blr
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-LABEL: test_iequi_z:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: cntlzw r3, r3
; CHECK-BE-NEXT: srwi r3, r3, 5
; CHECK-BE-NEXT: blr
;
; CHECK-LE-LABEL: test_iequi_z:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: cntlzw r3, r3
; CHECK-LE-NEXT: srwi r3, r3, 5
; CHECK-LE-NEXT: blr
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
entry:
%cmp = icmp eq i32 %a, 0
%conv = zext i1 %cmp to i32
ret i32 %conv
}
; Function Attrs: norecurse nounwind readnone
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
define dso_local signext i32 @test_iequi_sext_z(i32 zeroext %a) {
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-LABEL: test_iequi_sext_z:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-04 18:18:51 +01:00
; CHECK: # %bb.0: # %entry
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: cntlzw r3, r3
Recommit r310809 with a fix for the spill problem This patch re-commits the patch that was pulled out due to a problem it caused, but with a fix for the problem. The fix was reviewed separately by Eric Christopher and Hal Finkel. Differential Revision: https://reviews.llvm.org/D38054 llvm-svn: 313978
2017-09-22 13:50:25 +02:00
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: neg r3, r3
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: blr
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-LABEL: test_iequi_sext_z:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: cntlzw r3, r3
; CHECK-BE-NEXT: srwi r3, r3, 5
; CHECK-BE-NEXT: neg r3, r3
; CHECK-BE-NEXT: blr
;
; CHECK-LE-LABEL: test_iequi_sext_z:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: cntlzw r3, r3
; CHECK-LE-NEXT: srwi r3, r3, 5
; CHECK-LE-NEXT: neg r3, r3
; CHECK-LE-NEXT: blr
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
entry:
%cmp = icmp eq i32 %a, 0
%sub = sext i1 %cmp to i32
ret i32 %sub
}
; Function Attrs: norecurse nounwind
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
define dso_local void @test_iequi_store(i32 zeroext %a, i32 zeroext %b) {
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-LABEL: test_iequi_store:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-04 18:18:51 +01:00
; CHECK: # %bb.0: # %entry
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: xor r3, r3, r4
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-NEXT: addis r5, r2, glob@toc@ha
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-NEXT: stw r3, glob@toc@l(r5)
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: blr
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-LABEL: test_iequi_store:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: xor r3, r3, r4
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
; CHECK-BE-NEXT: addis r5, r2, glob@toc@ha
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-NEXT: cntlzw r3, r3
; CHECK-BE-NEXT: srwi r3, r3, 5
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
; CHECK-BE-NEXT: stw r3, glob@toc@l(r5)
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-NEXT: blr
;
; CHECK-LE-LABEL: test_iequi_store:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: xor r3, r3, r4
; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha
; CHECK-LE-NEXT: cntlzw r3, r3
; CHECK-LE-NEXT: srwi r3, r3, 5
; CHECK-LE-NEXT: stw r3, glob@toc@l(r5)
; CHECK-LE-NEXT: blr
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
entry:
%cmp = icmp eq i32 %a, %b
%conv = zext i1 %cmp to i32
store i32 %conv, i32* @glob, align 4
ret void
}
; Function Attrs: norecurse nounwind
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
define dso_local void @test_iequi_sext_store(i32 zeroext %a, i32 zeroext %b) {
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-LABEL: test_iequi_sext_store:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-04 18:18:51 +01:00
; CHECK: # %bb.0: # %entry
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler We want to run the Machine Scheduler instead of the List Scheduler after RA. Checked with a performance run on a Power 9 machine with SPEC 2006 and while some benchmarks improved and others degraded the geomean was slightly improved with the Machine Scheduler. Differential Revision: https://reviews.llvm.org/D45265 llvm-svn: 336295
2018-07-04 20:54:25 +02:00
; CHECK-NEXT: xor r3, r3, r4
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-NEXT: addis r5, r2, glob@toc@ha
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: cntlzw r3, r3
Recommit r310809 with a fix for the spill problem This patch re-commits the patch that was pulled out due to a problem it caused, but with a fix for the problem. The fix was reviewed separately by Eric Christopher and Hal Finkel. Differential Revision: https://reviews.llvm.org/D38054 llvm-svn: 313978
2017-09-22 13:50:25 +02:00
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: neg r3, r3
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-NEXT: stw r3, glob@toc@l(r5)
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: blr
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-LABEL: test_iequi_sext_store:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: xor r3, r3, r4
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
; CHECK-BE-NEXT: addis r5, r2, glob@toc@ha
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-NEXT: cntlzw r3, r3
; CHECK-BE-NEXT: srwi r3, r3, 5
; CHECK-BE-NEXT: neg r3, r3
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
; CHECK-BE-NEXT: stw r3, glob@toc@l(r5)
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-NEXT: blr
;
; CHECK-LE-LABEL: test_iequi_sext_store:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: xor r3, r3, r4
; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha
; CHECK-LE-NEXT: cntlzw r3, r3
; CHECK-LE-NEXT: srwi r3, r3, 5
; CHECK-LE-NEXT: neg r3, r3
; CHECK-LE-NEXT: stw r3, glob@toc@l(r5)
; CHECK-LE-NEXT: blr
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
entry:
%cmp = icmp eq i32 %a, %b
%sub = sext i1 %cmp to i32
store i32 %sub, i32* @glob, align 4
ret void
}
; Function Attrs: norecurse nounwind
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
define dso_local void @test_iequi_z_store(i32 zeroext %a) {
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-LABEL: test_iequi_z_store:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-04 18:18:51 +01:00
; CHECK: # %bb.0: # %entry
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: cntlzw r3, r3
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-NEXT: addis r4, r2, glob@toc@ha
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: srwi r3, r3, 5
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-NEXT: stw r3, glob@toc@l(r4)
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: blr
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-LABEL: test_iequi_z_store:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: cntlzw r3, r3
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
; CHECK-BE-NEXT: addis r4, r2, glob@toc@ha
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-NEXT: srwi r3, r3, 5
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
; CHECK-BE-NEXT: stw r3, glob@toc@l(r4)
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-NEXT: blr
;
; CHECK-LE-LABEL: test_iequi_z_store:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: cntlzw r3, r3
; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha
; CHECK-LE-NEXT: srwi r3, r3, 5
; CHECK-LE-NEXT: stw r3, glob@toc@l(r4)
; CHECK-LE-NEXT: blr
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
entry:
%cmp = icmp eq i32 %a, 0
%conv = zext i1 %cmp to i32
store i32 %conv, i32* @glob, align 4
ret void
}
; Function Attrs: norecurse nounwind
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
define dso_local void @test_iequi_sext_z_store(i32 zeroext %a) {
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-LABEL: test_iequi_sext_z_store:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-04 18:18:51 +01:00
; CHECK: # %bb.0: # %entry
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: cntlzw r3, r3
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-NEXT: addis r4, r2, glob@toc@ha
Recommit r310809 with a fix for the spill problem This patch re-commits the patch that was pulled out due to a problem it caused, but with a fix for the problem. The fix was reviewed separately by Eric Christopher and Hal Finkel. Differential Revision: https://reviews.llvm.org/D38054 llvm-svn: 313978
2017-09-22 13:50:25 +02:00
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: neg r3, r3
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-NEXT: stw r3, glob@toc@l(r4)
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
; CHECK-NEXT: blr
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-LABEL: test_iequi_sext_z_store:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: cntlzw r3, r3
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
; CHECK-BE-NEXT: addis r4, r2, glob@toc@ha
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-NEXT: srwi r3, r3, 5
; CHECK-BE-NEXT: neg r3, r3
[PowerPC][test] Add explicit dso_local to definitions in ELF static relocation model tests TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such definitions. Adding explicit dso_local makes these tests align with the clang -fpic behavior and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case. Rewrite preemption.ll to dsolocal-static.ll and dsolocal-pic.ll, and add "PIC Level" metadata.
2020-12-30 19:32:34 +01:00
; CHECK-BE-NEXT: stw r3, glob@toc@l(r4)
[PowerPC] Make no-PIC default to match GCC - LLVM Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
2018-12-04 21:14:57 +01:00
; CHECK-BE-NEXT: blr
;
; CHECK-LE-LABEL: test_iequi_sext_z_store:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: cntlzw r3, r3
; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha
; CHECK-LE-NEXT: srwi r3, r3, 5
; CHECK-LE-NEXT: neg r3, r3
; CHECK-LE-NEXT: stw r3, glob@toc@l(r4)
; CHECK-LE-NEXT: blr
[PowerPC] Eliminate integer compare instructions - vol. 1 This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 llvm-svn: 302810
2017-05-11 18:54:23 +02:00
entry:
%cmp = icmp eq i32 %a, 0
%sub = sext i1 %cmp to i32
store i32 %sub, i32* @glob, align 4
ret void
}
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