2021-02-23 23:27:06 +01:00
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -run-pass=arm-ldst-opt %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv7a-none-unknown-eabi"
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define i8* @STR_pre4(i8* %p, i32 %v) { unreachable }
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define i8* @STR_pre8(i8* %p, i32 %v) { unreachable }
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define i8* @STR_pre255(i8* %p, i32 %v) { unreachable }
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define i8* @STR_pre256(i8* %p, i32 %v) { unreachable }
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define i8* @STR_pre1024(i8* %p, i32 %v) { unreachable }
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define i8* @STR_pre4095(i8* %p, i32 %v) { unreachable }
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define i8* @STR_pre4096(i8* %p, i32 %v) { unreachable }
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define i8* @STR_prem1024(i8* %p, i32 %v) { unreachable }
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define i8* @STR_prem4095(i8* %p, i32 %v) { unreachable }
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define i8* @STR_prem4096(i8* %p, i32 %v) { unreachable }
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define i8* @STR_post4(i8* %p, i32 %v) { unreachable }
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define i8* @STR_post8(i8* %p, i32 %v) { unreachable }
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define i8* @STR_post255(i8* %p, i32 %v) { unreachable }
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define i8* @STR_post256(i8* %p, i32 %v) { unreachable }
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define i8* @STR_post1024(i8* %p, i32 %v) { unreachable }
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define i8* @STR_post4095(i8* %p, i32 %v) { unreachable }
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define i8* @STR_post4096(i8* %p, i32 %v) { unreachable }
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define i8* @STR_postm1024(i8* %p, i32 %v) { unreachable }
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define i8* @STR_postm4095(i8* %p, i32 %v) { unreachable }
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define i8* @STR_postm4096(i8* %p, i32 %v) { unreachable }
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...
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---
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name: STR_pre4
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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bb.0 (%ir-block.0):
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liveins: $r0, $r1
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; CHECK-LABEL: name: STR_pre4
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; CHECK: liveins: $r0, $r1
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2021-05-20 04:25:51 +02:00
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; CHECK: early-clobber $r0 = STR_PRE_IMM killed $r1, $r0, 4, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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renamable $r0 = nuw ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: STR_pre8
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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bb.0 (%ir-block.0):
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liveins: $r0, $r1
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; CHECK-LABEL: name: STR_pre8
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; CHECK: liveins: $r0, $r1
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; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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renamable $r0 = nuw ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: STR_pre255
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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bb.0 (%ir-block.0):
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liveins: $r0, $r1
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; CHECK-LABEL: name: STR_pre255
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; CHECK: liveins: $r0, $r1
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; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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renamable $r0 = nuw ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: STR_pre256
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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bb.0 (%ir-block.0):
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liveins: $r0, $r1
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; CHECK-LABEL: name: STR_pre256
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; CHECK: liveins: $r0, $r1
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; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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renamable $r0 = nuw ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: STR_pre1024
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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bb.0 (%ir-block.0):
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liveins: $r0, $r1
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; CHECK-LABEL: name: STR_pre1024
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; CHECK: liveins: $r0, $r1
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; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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renamable $r0 = nuw ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: STR_pre4095
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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bb.0 (%ir-block.0):
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liveins: $r0, $r1
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; CHECK-LABEL: name: STR_pre4095
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; CHECK: liveins: $r0, $r1
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; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 4095, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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renamable $r0 = nuw ADDri killed renamable $r0, 4095, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: STR_pre4096
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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bb.0 (%ir-block.0):
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liveins: $r0, $r1
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; CHECK-LABEL: name: STR_pre4096
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; CHECK: liveins: $r0, $r1
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; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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renamable $r0 = nuw ADDri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: STR_prem1024
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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bb.0 (%ir-block.0):
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liveins: $r0, $r1
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; CHECK-LABEL: name: STR_prem1024
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; CHECK: liveins: $r0, $r1
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; CHECK: renamable $r0 = nuw SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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renamable $r0 = nuw SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: STR_prem4095
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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bb.0 (%ir-block.0):
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liveins: $r0, $r1
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; CHECK-LABEL: name: STR_prem4095
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; CHECK: liveins: $r0, $r1
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; CHECK: renamable $r0 = nuw SUBri killed renamable $r0, 4095, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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renamable $r0 = nuw SUBri killed renamable $r0, 4095, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: STR_prem4096
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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bb.0 (%ir-block.0):
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liveins: $r0, $r1
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; CHECK-LABEL: name: STR_prem4096
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; CHECK: liveins: $r0, $r1
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; CHECK: renamable $r0 = nuw SUBri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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renamable $r0 = nuw SUBri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
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2021-05-20 04:25:51 +02:00
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STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: STR_post4
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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bb.0 (%ir-block.0):
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liveins: $r0, $r1
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; CHECK-LABEL: name: STR_post4
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; CHECK: liveins: $r0, $r1
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2021-05-20 04:25:51 +02:00
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; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 4, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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2021-05-20 04:25:51 +02:00
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STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
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2021-02-23 23:27:06 +01:00
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renamable $r0 = nuw ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
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BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: STR_post8
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
|
|
|
|
bb.0 (%ir-block.0):
|
|
|
|
liveins: $r0, $r1
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: STR_post8
|
|
|
|
; CHECK: liveins: $r0, $r1
|
2021-05-20 04:25:51 +02:00
|
|
|
; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 8, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
2021-05-20 04:25:51 +02:00
|
|
|
STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
renamable $r0 = nuw ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
|
|
|
|
BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: STR_post255
|
|
|
|
alignment: 4
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
|
|
|
- { reg: '$r0', virtual-reg: '' }
|
|
|
|
- { reg: '$r1', virtual-reg: '' }
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
|
|
|
liveins: $r0, $r1
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: STR_post255
|
|
|
|
; CHECK: liveins: $r0, $r1
|
2021-05-20 04:25:51 +02:00
|
|
|
; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 255, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
2021-05-20 04:25:51 +02:00
|
|
|
STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
renamable $r0 = nuw ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
|
|
|
|
BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: STR_post256
|
|
|
|
alignment: 4
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
|
|
|
- { reg: '$r0', virtual-reg: '' }
|
|
|
|
- { reg: '$r1', virtual-reg: '' }
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
|
|
|
liveins: $r0, $r1
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: STR_post256
|
|
|
|
; CHECK: liveins: $r0, $r1
|
2021-05-20 04:25:51 +02:00
|
|
|
; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 256, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
2021-05-20 04:25:51 +02:00
|
|
|
STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
renamable $r0 = nuw ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
|
|
|
|
BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: STR_post1024
|
|
|
|
alignment: 4
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
|
|
|
- { reg: '$r0', virtual-reg: '' }
|
|
|
|
- { reg: '$r1', virtual-reg: '' }
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
|
|
|
liveins: $r0, $r1
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: STR_post1024
|
|
|
|
; CHECK: liveins: $r0, $r1
|
2021-05-20 04:25:51 +02:00
|
|
|
; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 1024, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
2021-05-20 04:25:51 +02:00
|
|
|
STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
renamable $r0 = nuw ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
|
|
|
|
BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: STR_post4095
|
|
|
|
alignment: 4
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
|
|
|
- { reg: '$r0', virtual-reg: '' }
|
|
|
|
- { reg: '$r1', virtual-reg: '' }
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
|
|
|
liveins: $r0, $r1
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: STR_post4095
|
|
|
|
; CHECK: liveins: $r0, $r1
|
2021-05-20 04:25:51 +02:00
|
|
|
; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 2095, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
2021-05-20 04:25:51 +02:00
|
|
|
STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
renamable $r0 = nuw ADDri killed renamable $r0, 2095, 14 /* CC::al */, $noreg, $noreg
|
|
|
|
BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: STR_post4096
|
|
|
|
alignment: 4
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
|
|
|
- { reg: '$r0', virtual-reg: '' }
|
|
|
|
- { reg: '$r1', virtual-reg: '' }
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
|
|
|
liveins: $r0, $r1
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: STR_post4096
|
|
|
|
; CHECK: liveins: $r0, $r1
|
2021-05-20 04:25:51 +02:00
|
|
|
; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
|
|
|
|
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
2021-05-20 04:25:51 +02:00
|
|
|
STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
renamable $r0 = nuw ADDri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
|
|
|
|
BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: STR_postm1024
|
|
|
|
alignment: 4
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
|
|
|
- { reg: '$r0', virtual-reg: '' }
|
|
|
|
- { reg: '$r1', virtual-reg: '' }
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
|
|
|
liveins: $r0, $r1
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: STR_postm1024
|
|
|
|
; CHECK: liveins: $r0, $r1
|
2021-05-20 04:25:51 +02:00
|
|
|
; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 5120, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
2021-05-20 04:25:51 +02:00
|
|
|
STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
renamable $r0 = nuw SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
|
|
|
|
BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: STR_postm4095
|
|
|
|
alignment: 4
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
|
|
|
- { reg: '$r0', virtual-reg: '' }
|
|
|
|
- { reg: '$r1', virtual-reg: '' }
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
|
|
|
liveins: $r0, $r1
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: STR_postm4095
|
|
|
|
; CHECK: liveins: $r0, $r1
|
2021-05-20 04:25:51 +02:00
|
|
|
; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 6191, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
2021-05-20 04:25:51 +02:00
|
|
|
STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
renamable $r0 = nuw SUBri killed renamable $r0, 2095, 14 /* CC::al */, $noreg, $noreg
|
|
|
|
BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: STR_postm4096
|
|
|
|
alignment: 4
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
|
|
|
- { reg: '$r0', virtual-reg: '' }
|
|
|
|
- { reg: '$r1', virtual-reg: '' }
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
|
|
|
liveins: $r0, $r1
|
|
|
|
|
|
|
|
; CHECK-LABEL: name: STR_postm4096
|
|
|
|
; CHECK: liveins: $r0, $r1
|
2021-05-20 04:25:51 +02:00
|
|
|
; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
; CHECK: renamable $r0 = nuw SUBri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
|
|
|
|
; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
2021-05-20 04:25:51 +02:00
|
|
|
STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
|
2021-02-23 23:27:06 +01:00
|
|
|
renamable $r0 = nuw SUBri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
|
|
|
|
BX_RET 14 /* CC::al */, $noreg, implicit $r0
|
|
|
|
|
|
|
|
...
|