2006-05-15 00:18:28 +02:00
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//===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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2007-12-29 21:36:04 +01:00
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// This file is distributed under the University of Illinois Open Source
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2006-05-15 00:18:28 +02:00
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "ARMTargetMachine.h"
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2009-08-22 22:48:53 +02:00
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#include "ARMMCAsmInfo.h"
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2011-01-10 13:39:04 +01:00
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#include "ARMFrameLowering.h"
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2006-05-15 00:18:28 +02:00
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#include "ARM.h"
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#include "llvm/PassManager.h"
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2007-05-16 04:01:49 +02:00
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#include "llvm/CodeGen/Passes.h"
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2010-12-05 23:04:16 +01:00
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#include "llvm/Support/CommandLine.h"
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2009-07-14 22:18:05 +02:00
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#include "llvm/Support/FormattedStream.h"
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2007-01-19 08:51:42 +01:00
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#include "llvm/Target/TargetOptions.h"
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2009-07-25 08:49:55 +02:00
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#include "llvm/Target/TargetRegistry.h"
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2006-05-15 00:18:28 +02:00
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using namespace llvm;
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2010-12-05 23:04:16 +01:00
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static cl::opt<bool>ExpandMLx("expand-fp-mlx", cl::init(false), cl::Hidden);
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2010-03-20 23:36:22 +01:00
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static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
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2009-08-12 09:22:17 +02:00
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Triple TheTriple(TT);
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switch (TheTriple.getOS()) {
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case Triple::Darwin:
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2009-08-22 23:03:30 +02:00
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return new ARMMCAsmInfoDarwin();
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2009-08-12 09:22:17 +02:00
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default:
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2009-08-22 22:48:53 +02:00
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return new ARMELFMCAsmInfo();
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2009-08-12 09:22:17 +02:00
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}
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}
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2010-09-27 20:31:37 +02:00
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// This is duplicated code. Refactor this.
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static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
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MCContext &Ctx, TargetAsmBackend &TAB,
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2010-11-17 06:41:32 +01:00
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raw_ostream &OS,
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MCCodeEmitter *Emitter,
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2010-09-27 20:31:37 +02:00
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bool RelaxAll) {
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2010-11-17 06:41:32 +01:00
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switch (Triple(TT).getOS()) {
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case Triple::Darwin:
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2010-11-17 06:41:32 +01:00
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return createMachOStreamer(Ctx, TAB, OS, Emitter, RelaxAll);
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2010-09-27 20:31:37 +02:00
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case Triple::MinGW32:
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case Triple::MinGW64:
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case Triple::Cygwin:
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case Triple::Win32:
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2010-09-28 23:40:26 +02:00
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llvm_unreachable("ARM does not support Windows COFF format");
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return NULL;
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2010-09-27 20:31:37 +02:00
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default:
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2010-11-17 06:41:32 +01:00
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return createELFStreamer(Ctx, TAB, OS, Emitter, RelaxAll);
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2010-09-27 20:31:37 +02:00
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}
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}
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2009-08-11 17:33:49 +02:00
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extern "C" void LLVMInitializeARMTarget() {
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2009-07-25 08:49:55 +02:00
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// Register the target.
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RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
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RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
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2009-09-14 19:27:35 +02:00
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2009-08-12 09:22:17 +02:00
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// Register the target asm info.
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2009-08-22 22:48:53 +02:00
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RegisterAsmInfoFn A(TheARMTarget, createMCAsmInfo);
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RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo);
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2010-09-27 20:31:37 +02:00
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// Register the MC Code Emitter
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2010-11-17 06:41:32 +01:00
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TargetRegistry::RegisterCodeEmitter(TheARMTarget, createARMMCCodeEmitter);
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TargetRegistry::RegisterCodeEmitter(TheThumbTarget, createARMMCCodeEmitter);
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2010-09-27 20:31:37 +02:00
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2010-09-30 04:17:26 +02:00
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// Register the asm backend.
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2010-11-17 06:41:32 +01:00
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TargetRegistry::RegisterAsmBackend(TheARMTarget, createARMAsmBackend);
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TargetRegistry::RegisterAsmBackend(TheThumbTarget, createARMAsmBackend);
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2010-09-30 04:17:26 +02:00
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2010-09-27 20:31:37 +02:00
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// Register the object streamer.
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2010-11-17 06:41:32 +01:00
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TargetRegistry::RegisterObjectStreamer(TheARMTarget, createMCStreamer);
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TargetRegistry::RegisterObjectStreamer(TheThumbTarget, createMCStreamer);
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2010-09-27 20:31:37 +02:00
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2009-07-25 08:49:55 +02:00
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}
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2009-06-16 22:12:29 +02:00
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2007-02-23 04:14:31 +01:00
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/// TargetMachine ctor - Create an ARM architecture model.
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///
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2009-07-15 22:24:03 +02:00
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ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
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2009-08-03 01:37:13 +02:00
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const std::string &TT,
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2009-06-26 23:28:53 +02:00
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const std::string &FS,
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bool isThumb)
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2009-08-11 22:42:37 +02:00
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: LLVMTargetMachine(T, TT),
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2009-08-03 01:37:13 +02:00
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Subtarget(TT, FS, isThumb),
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2008-11-08 08:38:22 +01:00
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JITInfo(),
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2010-10-03 20:59:45 +02:00
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InstrItins(Subtarget.getInstrItineraryData())
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2010-09-27 20:31:37 +02:00
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{
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2008-10-30 17:10:54 +01:00
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DefRelocModel = getRelocationModel();
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}
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2006-05-15 00:18:28 +02:00
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2009-08-03 01:37:13 +02:00
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ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
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2009-07-15 22:24:03 +02:00
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const std::string &FS)
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2010-10-03 20:59:45 +02:00
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: ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
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DataLayout(Subtarget.isAPCS_ABI() ?
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std::string("e-p:32:32-f64:32:64-i64:32:64-"
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"v128:32:128-v64:32:64-n32") :
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std::string("e-p:32:32-f64:64:64-i64:64:64-"
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"v128:64:128-v64:64:64-n32")),
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ELFWriterInfo(*this),
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2010-05-11 19:31:57 +02:00
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TLInfo(*this),
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2010-11-15 01:06:54 +01:00
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TSInfo(*this),
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2011-01-10 13:39:04 +01:00
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FrameLowering(Subtarget) {
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2010-08-11 09:17:46 +02:00
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if (!Subtarget.hasARMOps())
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report_fatal_error("CPU: '" + Subtarget.getCPUString() + "' does not "
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"support ARM mode execution!");
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2009-06-26 23:28:53 +02:00
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}
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2009-08-03 01:37:13 +02:00
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ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
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2009-07-15 22:24:03 +02:00
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const std::string &FS)
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2009-08-03 01:37:13 +02:00
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: ARMBaseTargetMachine(T, TT, FS, true),
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2009-08-15 09:59:10 +02:00
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InstrInfo(Subtarget.hasThumb2()
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? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
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: ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
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2010-10-03 20:59:45 +02:00
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DataLayout(Subtarget.isAPCS_ABI() ?
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std::string("e-p:32:32-f64:32:64-i64:32:64-"
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"i16:16:32-i8:8:32-i1:8:32-"
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"v128:32:128-v64:32:64-a:0:32-n32") :
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std::string("e-p:32:32-f64:64:64-i64:64:64-"
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"i16:16:32-i8:8:32-i1:8:32-"
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"v128:64:128-v64:64:64-a:0:32-n32")),
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ELFWriterInfo(*this),
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2010-05-11 19:31:57 +02:00
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TLInfo(*this),
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2010-11-15 01:06:54 +01:00
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TSInfo(*this),
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2011-01-10 13:39:04 +01:00
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FrameLowering(Subtarget.hasThumb2()
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? new ARMFrameLowering(Subtarget)
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: (ARMFrameLowering*)new Thumb1FrameLowering(Subtarget)) {
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2009-06-26 23:28:53 +02:00
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}
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2010-07-24 23:52:08 +02:00
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// Pass Pipeline Configuration
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bool ARMBaseTargetMachine::addPreISel(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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if (OptLevel != CodeGenOpt::None)
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PM.add(createARMGlobalMergePass(getTargetLowering()));
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2006-05-15 00:18:28 +02:00
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2010-07-24 23:52:08 +02:00
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return false;
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}
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2007-01-19 08:51:42 +01:00
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2009-06-26 23:28:53 +02:00
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bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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2009-09-28 16:30:20 +02:00
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PM.add(createARMISelDag(*this, OptLevel));
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2006-09-04 06:14:57 +02:00
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return false;
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}
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2006-09-19 17:49:25 +02:00
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2009-06-26 23:28:53 +02:00
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bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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2009-09-27 11:46:04 +02:00
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// FIXME: temporarily disabling load / store optimization pass for Thumb1.
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2010-11-11 21:50:14 +01:00
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if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
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2009-06-13 11:12:55 +02:00
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PM.add(createARMLoadStoreOptimizationPass(true));
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2010-12-05 23:04:16 +01:00
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if (ExpandMLx &&
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OptLevel != CodeGenOpt::None && Subtarget.hasVFP2())
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PM.add(createMLxExpansionPass());
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2010-06-09 03:46:50 +02:00
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2009-06-13 11:12:55 +02:00
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return true;
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}
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2009-09-30 10:53:01 +02:00
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bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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// FIXME: temporarily disabling load / store optimization pass for Thumb1.
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2010-11-11 21:50:14 +01:00
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if (OptLevel != CodeGenOpt::None) {
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if (!Subtarget.isThumb1Only())
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PM.add(createARMLoadStoreOptimizationPass());
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if (Subtarget.hasNEON())
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PM.add(createNEONMoveFixPass());
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}
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2009-09-30 10:53:01 +02:00
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2009-11-07 00:52:48 +01:00
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// Expand some pseudo instructions into multiple instructions to allow
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// proper scheduling.
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PM.add(createARMExpandPseudoPass());
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2010-06-19 01:32:07 +02:00
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if (OptLevel != CodeGenOpt::None) {
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2010-06-19 01:09:54 +02:00
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if (!Subtarget.isThumb1Only())
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2010-06-16 09:35:02 +02:00
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PM.add(createIfConverterPass());
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}
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2010-06-24 21:10:14 +02:00
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if (Subtarget.isThumb2())
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PM.add(createThumb2ITBlockPass());
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2010-06-16 09:35:02 +02:00
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2009-09-30 10:53:01 +02:00
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return true;
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}
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2009-06-26 23:28:53 +02:00
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bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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2010-08-09 20:35:19 +02:00
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if (Subtarget.isThumb2() && !Subtarget.prefers32BitThumb())
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2009-08-11 01:56:04 +02:00
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PM.add(createThumb2SizeReductionPass());
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2009-07-10 03:54:42 +02:00
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2007-01-19 08:51:42 +01:00
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PM.add(createARMConstantIslandPass());
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2006-09-19 17:49:25 +02:00
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return true;
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}
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2009-06-26 23:28:53 +02:00
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bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE) {
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2009-05-30 22:51:52 +02:00
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// FIXME: Move this to TargetJITInfo!
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if (DefRelocModel == Reloc::Default)
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setRelocationModel(Reloc::Static);
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// Machine code emitter pass for ARM.
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PM.add(createARMJITCodeEmitterPass(*this, JCE));
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return false;
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}
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