llvm-mirror/test/CodeGen/X86/uint_to_fp-2.ll

; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s

; rdar://6504833
define float @test1(i32 %x) nounwind readnone {
; CHECK: test1
; CHECK: movd
; CHECK: orps
; CHECK: subsd
; CHECK: cvtsd2ss
; CHECK: movss
; CHECK: flds
; CHECK: ret
entry:
	%0 = uitofp i32 %x to float
	ret float %0
}

; PR10802
define float @test2(<4 x i32> %x) nounwind readnone ssp {
; CHECK: test2
; CHECK: xorps [[ZERO:%xmm[0-9]+]]
; CHECK: movss {{.*}}, [[ZERO]]
; CHECK: orps
; CHECK: subsd
; CHECK: cvtsd2ss
; CHECK: movss
; CHECK: flds
; CHECK: ret
entry:
  %vecext = extractelement <4 x i32> %x, i32 0
  %conv = uitofp i32 %vecext to float
  ret float %conv
}
Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. llvm-svn: 138768 2011-08-29 23:15:46 +02:00			`; RUN: llc < %s -march=x86 -mattr=+sse2 \| FileCheck %s`
Make linear scan's trivial coalescer slightly more aggressive. llvm-svn: 62547 2009-01-20 01:16:18 +01:00
Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. llvm-svn: 138768 2011-08-29 23:15:46 +02:00			`; rdar://6504833`
			`define float @test1(i32 %x) nounwind readnone {`
			`; CHECK: test1`
			`; CHECK: movd`
Removed PackedDouble domain from scalar instructions. Added more formats for the scalar stuff. llvm-svn: 183626 2013-06-09 09:37:10 +02:00			`; CHECK: orps`
Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. llvm-svn: 138768 2011-08-29 23:15:46 +02:00			`; CHECK: subsd`
			`; CHECK: cvtsd2ss`
			`; CHECK: movss`
			`; CHECK: flds`
			`; CHECK: ret`
Make linear scan's trivial coalescer slightly more aggressive. llvm-svn: 62547 2009-01-20 01:16:18 +01:00			`entry:`
			`%0 = uitofp i32 %x to float`
			`ret float %0`
			`}`
Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. llvm-svn: 138768 2011-08-29 23:15:46 +02:00
			`; PR10802`
			`define float @test2(<4 x i32> %x) nounwind readnone ssp {`
			`; CHECK: test2`
			`; CHECK: xorps [[ZERO:%xmm[0-9]+]]`
			`; CHECK: movss {{.*}}, [[ZERO]]`
			`; CHECK: orps`
			`; CHECK: subsd`
			`; CHECK: cvtsd2ss`
			`; CHECK: movss`
			`; CHECK: flds`
			`; CHECK: ret`
			`entry:`
			`%vecext = extractelement <4 x i32> %x, i32 0`
			`%conv = uitofp i32 %vecext to float`
			`ret float %conv`
			`}`