2013-04-06 01:31:35 +02:00
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;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s
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2013-03-27 10:12:51 +01:00
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2013-06-03 19:40:11 +02:00
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;CHECK: V_MOV_B32_e32 VGPR{{[0-9]+}}, -1431655765
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;CHECK: V_MUL_HI_U32 VGPR0, {{[SV]GPR[0-9]+}}, {{VGPR[0-9]+}}
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2013-03-27 10:12:59 +01:00
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;CHECK-NEXT: V_LSHRREV_B32_e32 VGPR0, 1, VGPR0
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2013-03-27 10:12:51 +01:00
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define void @test(i32 %p) {
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%i = udiv i32 %p, 3
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%r = bitcast i32 %i to float
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call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r)
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ret void
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}
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declare <4 x float> @llvm.SI.sample.(i32, <4 x i32>, <8 x i32>, <4 x i32>, i32) readnone
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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