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llvm-mirror/docs/AMDGPU/gfx9_vdst_4.rst

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[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
2018-12-17 18:38:11 +01:00
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[AMDGPU][MC][GFX9][NFC][DOC] Updated AMD GPU assembler syntax description. Fixed bugs 48639, 49447, 49448, 49449.
2021-07-23 11:51:37 +02:00
.. _amdgpu_synid_gfx9_vdst_4:
[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
2018-12-17 18:38:11 +01:00
vdst
[AMDGPU][MC][GFX9][NFC][DOC] Updated AMD GPU assembler syntax description. Fixed bugs 48639, 49447, 49448, 49449.
2021-07-23 11:51:37 +02:00
====
[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
2018-12-17 18:38:11 +01:00
Data returned by a 32-bit atomic flat instruction.
This is an optional operand. It must be used if and only if :ref:`glc<amdgpu_synid_glc>` is specified.
*Size:* 1 dword.
*Operands:* :ref:`v<amdgpu_synid_v>`
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