2014-04-01 20:34:13 +02:00
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; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
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2014-04-01 20:13:26 +02:00
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2014-10-01 19:15:17 +02:00
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; EG-LABEL: {{^}}and_setcc_setcc_i32:
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2014-04-01 20:13:26 +02:00
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; EG: AND_INT
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; EG-NEXT: SETE_INT
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2017-03-21 22:39:51 +01:00
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define amdgpu_kernel void @and_setcc_setcc_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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2014-04-01 20:13:26 +02:00
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%cmp1 = icmp eq i32 %a, -1
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%cmp2 = icmp eq i32 %b, -1
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%and = and i1 %cmp1, %cmp2
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%ext = sext i1 %and to i32
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store i32 %ext, i32 addrspace(1)* %out, align 4
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ret void
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}
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2014-10-01 19:15:17 +02:00
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; EG-LABEL: {{^}}and_setcc_setcc_v4i32:
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2014-04-01 20:13:26 +02:00
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; EG: AND_INT
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; EG: AND_INT
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; EG: SETE_INT
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; EG: AND_INT
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; EG: SETE_INT
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; EG: AND_INT
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; EG: SETE_INT
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2017-03-21 22:39:51 +01:00
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define amdgpu_kernel void @and_setcc_setcc_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> %a, <4 x i32> %b) {
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2014-04-01 20:13:26 +02:00
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%cmp1 = icmp eq <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>
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%cmp2 = icmp eq <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
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%and = and <4 x i1> %cmp1, %cmp2
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%ext = sext <4 x i1> %and to <4 x i32>
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store <4 x i32> %ext, <4 x i32> addrspace(1)* %out, align 4
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ret void
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2014-07-26 07:49:40 +02:00
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}
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