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llvm-mirror/test/MC/AVR/inst-sbci.s

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[AVR] Add all of the machine code test suite Summary: This adds all of the AVR machine code tests. Reviewers: arsenm, kparzysz Subscribers: wdng, japaric Differential Revision: https://reviews.llvm.org/D26387 llvm-svn: 286417
2016-11-10 00:46:25 +01:00
; RUN: llvm-mc -triple avr -show-encoding < %s | FileCheck %s
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options As announced here: http://lists.llvm.org/pipermail/llvm-dev/2019-April/131786.html Grouped option syntax (POSIX Utility Conventions) does not play well with -long-option A subsequent change will reject -long-option.
2020-03-16 00:17:52 +01:00
; RUN: llvm-mc -filetype=obj -triple avr < %s | llvm-objdump -d - | FileCheck --check-prefix=CHECK-INST %s
[AVR] Add all of the machine code test suite Summary: This adds all of the AVR machine code tests. Reviewers: arsenm, kparzysz Subscribers: wdng, japaric Differential Revision: https://reviews.llvm.org/D26387 llvm-svn: 286417
2016-11-10 00:46:25 +01:00
foo:
sbci r17, 21
sbci r23, 196
sbci r30, 244
sbci r19, 16
sbci r22, FOO
; CHECK: sbci r17, 21 ; encoding: [0x15,0x41]
; CHECK: sbci r23, 196 ; encoding: [0x74,0x4c]
; CHECK: sbci r30, 244 ; encoding: [0xe4,0x4f]
; CHECK: sbci r19, 16 ; encoding: [0x30,0x41]
; CHECK: sbci r22, FOO ; encoding: [0x60'A',0x40]
; CHECK: ; fixup A - offset: 0, value: FOO, kind: fixup_ldi
[AVR] Disassemble register operands Simply by implementing a few functions I was able to correctly disassemble a much larger amount of instructions. Differential Revision: https://reviews.llvm.org/D74045
2020-02-05 12:53:06 +01:00
; CHECK-INST: sbci r17, 21
; CHECK-INST: sbci r23, 196
; CHECK-INST: sbci r30, 244
; CHECK-INST: sbci r19, 16
; CHECK-INST: sbci r22, 0
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