llvm-mirror/test/TableGen/HwModeSelect.td

// RUN: not --crash llvm-tblgen -gen-dag-isel -I %p/../../include %s 2>&1 | FileCheck %s

// The HwModeSelect class is intended to serve as a base class for other
// classes that are then used to select a value based on the HW mode.
// It contains a list of HW modes, and a derived class should provide a
// list of corresponding values.
// These two lists must have the same size. Make sure that a violation of
// this requirement is diagnosed.

include "llvm/Target/Target.td"

def TestTargetInstrInfo : InstrInfo;

def TestTarget : Target {
  let InstructionSet = TestTargetInstrInfo;
}

def TestReg : Register<"testreg">;
def TestClass : RegisterClass<"TestTarget", [i32], 32, (add TestReg)>;

def TestMode1 : HwMode<"+feat1">;
def TestMode2 : HwMode<"+feat2">;

def BadDef : ValueTypeByHwMode<[TestMode1, TestMode2, DefaultMode],
                               [i8, i16, i32, i64]>;

// CHECK: error: in record BadDef derived from HwModeSelect: the lists Modes and Objects should have the same size
Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" This reverts commit 80a34ae31125aa46dcad47162ba45b152aed968d with fixes. Previously, since bots turning on EXPENSIVE_CHECKS are essentially turning on MachineVerifierPass by default on X86 and the fact that inline-asm-avx-v-constraint-32bit.ll and inline-asm-avx512vl-v-constraint-32bit.ll are not expected to generate functioning machine code, this would go down to `report_fatal_error` in MachineVerifierPass. Here passing `-verify-machineinstrs=0` to make the intent explicit. 2020-02-12 08:01:35 +01:00			`// RUN: not --crash llvm-tblgen -gen-dag-isel -I %p/../../include %s 2>&1 \| FileCheck %s`
TableGen support for parameterized register class information This replaces TableGen's type inference to operate on parameterized types instead of MVTs, and as a consequence, some interfaces have changed: - Uses of MVTs are replaced by ValueTypeByHwMode. - EEVT::TypeSet is replaced by TypeSetByHwMode. This affects the way that types and type sets are printed, and the tests relying on that have been updated. There are certain users of the inferred types outside of TableGen itself, namely FastISel and GlobalISel. For those users, the way that the types are accessed have changed. For typical scenarios, these replacements can be used: - TreePatternNode::getType(ResNo) -> getSimpleType(ResNo) - TreePatternNode::hasTypeSet(ResNo) -> hasConcreteType(ResNo) - TypeSet::isConcrete -> TypeSetByHwMode::isValueTypeByHwMode(false) For more information, please refer to the review page. Differential Revision: https://reviews.llvm.org/D31951 llvm-svn: 313271 2017-09-14 18:56:21 +02:00
			`// The HwModeSelect class is intended to serve as a base class for other`
			`// classes that are then used to select a value based on the HW mode.`
			`// It contains a list of HW modes, and a derived class should provide a`
			`// list of corresponding values.`
			`// These two lists must have the same size. Make sure that a violation of`
			`// this requirement is diagnosed.`

			`include "llvm/Target/Target.td"`

			`def TestTargetInstrInfo : InstrInfo;`

			`def TestTarget : Target {`
			`let InstructionSet = TestTargetInstrInfo;`
			`}`

			`def TestReg : Register<"testreg">;`
			`def TestClass : RegisterClass<"TestTarget", [i32], 32, (add TestReg)>;`

			`def TestMode1 : HwMode<"+feat1">;`
			`def TestMode2 : HwMode<"+feat2">;`

			`def BadDef : ValueTypeByHwMode<[TestMode1, TestMode2, DefaultMode],`
			`[i8, i16, i32, i64]>;`

			`// CHECK: error: in record BadDef derived from HwModeSelect: the lists Modes and Objects should have the same size`